Pan Pacific Symposium Conference Proceedings


RESEARCH ON QFN ASSEMBLY PROCESS

Authors: Zhenkai Qin and Shoukai Zhang
Company: Huawei Technologies Co., Ltd.
Date Published: 1/31/2007   Conference: Pan Pacific Symposium


Abstract: The bottom side of QFN (Quad-flat No-Lead) package has an exposed paddle, which used for heat dissipation. As QFN’s exposed paddle and I/O lands are on the same plane, and the pitch of QFN’s I/O land is very fine, QFN assembly is a challenge in industry. The following paper describes the impacts of PCB (Printed Circuit Board) thermal via design and stencil aperture design to QFN assembly. And we get solutions ensuring good yield of QFN assembly. Key words: QFN (Quad-flat No-Lead), Surface Mount, Design of Thermal Via, Stencil Aperture Design.



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