IWLPC (Wafer-Level Packaging) Conference Proceedings


CHALLENGES IN FLIP CHIP DIE SORTING, HANDLING AND INSPECTION

Author: Gerald Steinwasser
Company: Mühlbauer, Inc.
Date Published: 11/1/2006   Conference: IWLPC (Wafer-Level Packaging)


Abstract: The growing number of bare die applications naturally require faster and more efficient die sorting systems; however, at the same time, the quality requirements have become increasingly stringent, with more and more end users calling for zero defects! The capabilities of such systems have to combine speed (in excess of 10k UPH) and extreme vision inspection capabilities. These capabilities are challenged by the constantly growing variety of wafer materials and types, subsequent lighting influences, inspection criteria and various packaging media.

Keywords: Flip Chip, Known Good Die, Die Sorting, Wafer Map, Reel-to-reel Sorting, Carrier Tape, Bare Die Tape



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