IWLPC (Wafer-Level Packaging) Conference Proceedings


Authors: Greg Rudd and Bob Cronk
Company: SMI (Spectra-Mat, Inc.)
Date Published: 11/1/2006   Conference: IWLPC (Wafer-Level Packaging)

Abstract: Wafer level packaging of opto and opto-electronic devices can result in significant cost savings. A substrate with good thermal conductivity is required where devices dissipate significant power. Additionally, using a substrate with a coefficient of thermal expansion (CTE) similar to the device can increase reliability when temperature-induced strain is a problem. Tungsten-copper metal-matrix composite (W/Cu) has long been used for package components and heat sinks. It has good thermal conductivity, but unlike most alloys, it can be made with any of a range of CTE’s to match various other device and substrate materials. W/Cu has some ductility to relieve strain and is readily machined, plated, and brazed. Pure tungsten also has good conductivity and low CTE (~4.5). In our paper, we present data on W/Cu and pure W substrates up to 150mm diameter produced to specifications suitable for wafer level packaging. We describe the properties of the material and show the result of the measurement of flatness/bow, Total Thickness Variation (TTV), and surface finish. We also discuss how processes impact these parameters.

Key words: Wafer-level packaging, substrate, thermal expansion.

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