AN INTEGRATED DEEP SILICON ETCH/ DIRECTIONAL PHYSICAL VAPOR DEPOSITION PROCESS FOR THROUGH-WAFER VIA APPLICATIONSAuthors: G. Reynolds, C. Constantine, S. Lai, K. Mackenzie,
Company: Oerlikon USA, Inc., Oerlikon France, and OC Oerlik
Date Published: 11/1/2006 Conference: IWLPC (Wafer-Level Packaging)
Copper is the preferred metal for through-wafer interconnects due to its low resistivity and desirable electromigration characteristics. It is widely used in wafer packaging and also in on-chip interconnects. In conventional packaging applications such as under-bump metal, copper films are typically deposited by conventional sputtering. However, high aspect ratio through-wafer vias require a more directional metal flux that can be provided by Oerlikon’s Advanced Directional Sputtering.
In this paper, we describe an integrated deep silicon etch/ advanced directional sputtering process developed to provide enhanced Ta/ Cu sidewall coverage in the vias. The etch process produces a tapered via in a Si wafer with a slope of 60-80° and no overhang. Etch rates greater than 7µm/min. and excellent selectivity to oxide and photoresist are observed. SEM cross-sections of the resulting etch profiles before and after metallization are presented in combination with performance data of Oerlikon thin wafer processing capabilities.
Key words: deep silicon etch, directional sputtering, through-wafer vias.
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