SMTA International Conference Proceedings


Author: Nicole Butel
Company: Avago Technologies
Date Published: 9/24/2006   Conference: SMTA International

Abstract: The purpose of this study is to evaluate level 2 interconnect, i.e., the solder joint between the printed circuit board (PCB) and package, reliability of the Surface Laminar Circuit (SLC™) package using a four metal layer test silicon die. The SLC package test vehicle body size is 45 mm by 45 mm with a second level solder ball pitch of 1 mm.

The lidded SLC package substrate is 2.40 mm thick with solder mask defined (SMD) pads but excluding the solder ball height. Copper Solder-on-Pad (CuSOP) and Electroless Nickel Immersion Gold (ENIG) plating are evaluated, as well as a current and newer substrate material set. Three independent legs of the qualification were evaluated. The solder ball array is 43 by 43 mm with 3 balls depopulated in each corner, or a total of 1837 solder balls. The test vehicle die size is 17 mm x 15 mm. For each test matrix leg, fortytwo package assemblies were thermally cycled between 0°C and 100°C per IPC1 9701. The PCB test vehicle is 3.15 mm thick Organic Solderability Preservative (OSP) with eight copper layers. The non-solder-mask defined (NSMD) pads on the PCB have a diameter of 0.50 mm.

The accumulated failures were plotted in Weibull format. Failure analysis indicates the failures occurred at the substrate side in the eutectic solder.

The rework SLC test matrix leg A and B have a slightly better characteristic life, or ETA, than the virgin SLC test matrix leg A and B. Virgin and rework SLC-C have a better characteristic life than SLC-A and SLC-B. Each of the SLC test matrix legs exhibited a high slope indicative of a good manufacturing process. ETA for each of the test matrix legs is comparable to ETA values on previous SLC 2nd level studies. SLC ENIG performed slightly better than SLC CuSOP.

Per IPC 9701, 10 solder balls were sheared on 3 packages and passed the shear force requirement for all three test matrix legs. All failures were in the bulk of the solder near the substrate interface.

Key words: BGA, SLC, solder joints, ENIG, CuSOP implementation.

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