Pan Pacific Symposium Conference Proceedings


Authors: Chrys Shea, Rahul Raut, Quyen Chu, Nicholas Tokotc
Date Published: 1/17/2006   Conference: Pan Pacific Symposium

Abstract: As circuit board layouts get denser and interconnects get smaller, concerns of interconnect reliability due to void formation in the solder joints increase. The introduction of micro-vias in pads and lead-free assembly technology exacerbate these concerns. A Design of Experiment was used to correlate the effects of several control variables to the formation of solder voids in BGA’s during the reflow process. These variables include via presence and size, copper via fill technology, PWB surface finish, and alloy system. Three different sizes of BGA with pitches 0.5, 0.8, and 1.0 mm were used in the DOE. Via sizes included 0 (no via), 4mil (100 um), and 6mil (150 um). Half of vias were filled with a copper filling process; the other half were left unfilled. Surface finishes included Organic Solderability Preservative, Immersion Silver, and Electroless Nickel/Immersion Gold. Tin-lead and SAC305 alloys systems were used, for both BGA balls and solder paste. Boards were assembled under ramp and soak reflow profiles. The solder voiding size was measured by X-ray to determine the major contributions from control variables. Answers are sought to the following questions: Does lead-free solder alloy create more voids than conventional tin-lead alloy? How much more voiding will be expected if vias are in the pads? Will filling the vias limit the voiding? What part does surface finish play in void formation? Other trends in the data, including response to reflow profile, are also explored.

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