Pan Pacific Symposium Conference Proceedings


A STUDY OF RELIABILITY DROP TEST EFFECTS FOR SnAgCu SOLDER BUMP IN SYSTEM-IN-PACKAGE AND BOARD LEVEL PACKAGE

Authors: Hsiang-Chen Hsu, Yu-Chia Hsu, Hui-Yu Lee, Shen-Li
Company: ISU Taiwan
Date Published: 1/17/2006   Conference: Pan Pacific Symposium


Abstract: The objective of this paper is to investigate the transient dynamic response for electronic packages subject to JEDEC drop test standards JESD22-B110A and JESDB111A1- 2. Experimental results show that the most vulnerable component in IC package under drop test is the solder bump/joint, especially for subassembly package. Unlike 2D/strip model, a 3D solid model based on nonlinear contact explicit finite element scheme is developed to examine the reliability of Pb-free solder bumps in System-in-Package as well as in board level package. In this paper, parametric studies were performed for different compositions of SnAgCu solder ball and for different contact angles. The diameter of solder bumps is also evaluated to locate the failure modes under drop test conditions.



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