IWLPC (Wafer-Level Packaging) Conference Proceedings


MEMS WAFER-LEVEL PROCESSES

Authors: Ken Gilleo, Ph.D.
Company: ET-Trends LLC
Date Published: 11/3/2005   Conference: IWLPC (Wafer-Level Packaging)


Abstract: MEMS could become a hallmark technology for the 21st century. Ability to sense, analyze, compute, control and manufacture materials at chip-level can provide new and powerful products during this decade and far into the future. MEMS is about integration of electronics, mechanics, motion, light, sound, biology, chemistry, radio, video, and much more. While sensors are a large market today, MEMS also brings control including electrical, mechanical, optical, fluidic, and electromagnetic.

MEMS is a vital enabler where convergence of technology and science will miniaturize devices and help these fields work in partnership. Continued success is assured because MEMS is a robust and well-supported member of the immense semiconductor industry. But there are challenges in fabrication, micro-assembly and packaging.

The complete MEMS device can require assembly of several parts, especially for systems having internal cavities and fluid or gas channels. Several structural layers can be bonded together creating complex 3-dimensional parts that will later be singulated into tiny machines. Wafer-level packaging is not only feasible, it has been commercialized. Once the final “release” step is completed, movable parts are no longer protected by a surrounding sacrificial structure.

The devices are now more fragile and very sensitive to contamination until they are packaged. A tiny particle can permanently immobilize a MEMS chip making contamination a major yield loss factor. One strategy, that is becoming increasingly popular, is to complete as many processes as practical at wafer-level. Many other WL processes will be implemented in the future. This paper will describe existing wafer-level processes and suggest new possibilities.

Key words: MEMS, packaging, wafer-level



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