IWLPC (Wafer-Level Packaging) Conference Proceedings


MEAN TIME TO FAILURE IN WAFER LEVEL-CSP PACKAGES WITH SnPb AND SnAgCu SOLDER BUMPS

Authors: Stephen Gee and Luu Nguyen et al.
Company: National Semiconductor
Date Published: 11/3/2005   Conference: IWLPC (Wafer-Level Packaging)


Abstract: In this test setup, embedded die surface temperature sensors are used to assess device electromigration performance using a high precision, high density, resistance measurement system. Solder bump failures are found to result from voiding at the UBM/solder interface where CuSn intermetallic formation and vacancy pileup are observed. The driving mechanisms for electromigration induced voiding are determined experimentally through activation energies measurements in eutectic SnPb and SnAgCu solders.

Recommendations for how to measure electromigration in WL-CSP (Wafer Level-Chip Scale Package) solder bumps are also presented. Based upon an analytic model for calculating the resistance change due to solder bump voiding, it was determined that the fractional change in bump via opening should result in an absolute change in resistance, which should be independent of solder bump diameter.

Key Words: Resistivity; Sheet Resistance; Solder Resistance; Eutectic SnPb; SnAgCu; Lead Free; Electromigration; Temperature Sensor.



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