Pan Pacific Symposium Conference Proceedings


HIGH DENSITY ELECTRONICS PACKAGING ASSESSMENT

Author: Emmanuel J. Siméus
Company: Raytheon Electronic Systems
Date Published: 1/25/2000   Conference: Pan Pacific Symposium


Abstract: Raytheon Electronic Systems has been aggressively pursuing high-density electronics packaging technologies such as Ball Grid Array (BGA) and Chip Scale Packaging (CSP) for its military and space applications. Because of the rapid pace of integrated circuit technology where the silicon technology industry is already moving toward systems-on-chip (SOC), it becomes crucial and apparent that the electronics packaging industry must continue to meet the needs of the silicon density proliferation. Design and manufacturing engineers must stay abreast of the rapidly changing high-density packaging technology and its applications. Raytheon plays an important and active role with the BGA and CSP “in-kind” consortia started in 1995 and 1997, respectively. The consortia consist of many companies with diverse disciplines from commercial to space and aerospace industries. This paper will highlight Raytheon’s role with the consortia for the current Microvia PWB test vehicle design which encompasses new generation CSPs, Microvia board fabrication and to some extent PWB assembly.

Key Words: BGA, CSP, Microvia, PWB, Daisy Chain, X-ray, Reflow, Assembly, Solder.



Members download articles for free:

Not a member yet?

What else do you get when you join SMTA? Read about all of the benefits that go along with membership.

Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.


Back


SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344 USA

Phone +1 952.920.7682
Fax +1 952.926.1819