iNEMI OPTOELECTRONICS ROADMAP FOR 2004Author: Dr. Laura J. Turbini
Company: University of Toronto
Date Published: 9/25/2005 Conference: SMTA International
The chapters are divided by packaging level into Level 0 (on chip interconnections), Level 1 (packaged devices), and Level 2 (modules and card assemblies). Emerging technologies may impact optical interconnects are also discussed. The appendix describes global standards including the JISSO packaging levels and the IPC standards development work.
Key words: Optoelectronics, VCSEL, transmitters, emerging technologies.
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