Pan Pacific Symposium Conference Proceedings


DEVELOPMENT AND QUALIFICATION OF HIGH COMPLEXITY PCB

Author: Daniel Chienhung Lai
Company: Cisco Systems, Inc
Date Published: 1/25/2000   Conference: Pan Pacific Symposium


Abstract: This paper discusses technology development and qualification processes for highly complex printed circuit boards. These printed circuit boards require high aspect ratio holes, fine lines and spacing, high layer count, impedance control, and tight tolerance control. This qualification was created to select and develop PCB suppliers for a high technology and high volume product.

High I/O application specific integrated circuits always push the PCB manufacturing technology envelope. The current 1,600+ pin, 1mm grid array requires PCB’s to have thousands of high aspect ratio plated through holes. These designs also require high density in the inner layers to optimize the layer count and enable routing. High-speed applications require impedance control. The presence of high-density connectors and fine pitch CCGA’s demand much tighter tolerances in hole diameter, board flatness, and co-planarity among pads.

These high complexity requirements tighten the process windows of each step of the PCB manufacturing process. Real-time computer-aided monitoring and chemical replenishing at each critical step are essential when manufacturing these types of PCB’s. Additional test coupons utilizing current test technology were proved to be essential in process control and quality assurance.

Numerous PCB suppliers were selected for this technology development and qualification process. Throughout this study several solutions were developed while resolving issues encountered. These issues included residual solder mask trapped in high aspect ratio holes, low nickel plating, nickel skip plating, corrosion, micro cracking after multiple solder floats, annular ring break out and thin copper plating layers. The most difficult challenges were effectively cleaning, drilling with very little margin, registration, and plating uniformly on high aspect ratio holes. Plating evenly on high-aspect-ratio holes is further complicated by the requirements of fine pitch SMD pads and press-fit connectors. Numerous experiments were performed at several PCB suppliers to develop optimum process, materials, and set up.

The qualification boards were subjected to stringent tests, which simulated the thermal excursions encountered during the PCB assembly manufacturing process. Extensive analysis of plating, layer registration, solder mask, the hole wall quality, and laminate quality, were performed in this PCB qualification. This development and qualification has proven to be an effective tool for selecting and developing PCB suppliers for an advanced technology, high complexity, and high volume products.

Keywords: Printed circuit boards, high aspect ratio plated holes, fine pitch grid array components



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