Pan Pacific Symposium Conference Proceedings


EFFECT OF BAKING TIME AND TEMPERATURE ON LEAD FREE SECOND LEVEL INTERCONNECT SOLDER JOINT MICROSTRUCTURES, MICROHARDNESS AND IMC MORPHOLOGY

Authors: Norman J. Armendariz and Vasu Vasudevan
Company: Intel Corporation
Date Published: 2/25/2005   Conference: Pan Pacific Symposium


Abstract: This study was performed in order to better understand solid-state diffusion mechanisms at elevated baking temperatures and extended time reliability testing of lead-free Sn4.0Ag0.5Cu (SAC405), Sn3.5Ag and Sn3.5Ag0.5Cu (SAC305) second level interconnect solder joints between CPU-central processing unit sockets / BGA-ball grid array components and the PCB-printed circuit board with an ImAg-immersion -silver surface finish.

The bulk solder joint and IMC- interface intermetallic compounds that form after SMT reflow and bake reliability testing were evaluated in terms of their thickness and morphology. Moreover, solder joint microstructures were identified and characterized in terms of their bulk solder microhardness.



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