WAFER LEVEL PACKAGE TEST STRATEGIESAuthors: Paul Sakamoto and Alfred L. Crouch
Company: Inovys Corporation
Date Published: 10/10/2004 Conference: IWLPC (Wafer-Level Packaging)
WLP makes the traditional test flow outlined above both technically and economically unrewarding. New test flows and methodologies must be considered in order to optimize the overall yield and profits from WLP. Principal among the new requirements is that known good die (KGD) test flows are now a necessity to insure high yields in any multi-die packaging scheme. Failure to insure that the individual die are of high quality will result in the loss of the more expensive multi-die packaging as well as any collateral good die that reside in the same package. Assuring this high level of KGD test coverage and quality with minimal test steps and a high level of economy is a difficult challenge, and the focus of this article.
Key words: ATE, test, WLP, KGD, ATPG, DFT, BIST, structural test, functional test, scan, EDA.
Members download articles for free:
Not a member yet?
What else do you get when you join SMTA? Read about all of the benefits that go along with membership.
Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.