IWLPC (Wafer-Level Packaging) Conference Proceedings


LEAD-FREE BUMPING AND ITS CHALLENGES

Author: Y. Zhang et al.
Company: Cookson Electronics, Enthone
Date Published: 10/10/2004   Conference: IWLPC (Wafer-Level Packaging)


Abstract: The Electronics Industry is moving from SnPb solders to lead-free solders. This movement impacts the following materials areas: soldering material, board finish and component finishes. Solder wafer bumping can be found under component finishes in the semiconductor packaging/flip chip application area. Historically, wafer bumping uses SnPb solders regardless of whether the solder balls are being deposited by vapor phase, by stencil printing, by solder paste placements, or electroplating. What is of interest here is wafer bumping by electroplating, which is a relatively low cost alternative especially for fine pitch applications where other technologies face severe limitations.

Both high lead (>85%) and eutectic SnPb bumps have been manufactured by electroplating from chemistries that contain low alpha particle lead in solution. Today, the high lead SnPb bumps are exempted from the WEEE and RoHS directives. Decision has yet to be made with regard to eutectic solder bumps.

In this paper, we will present a few lead-free bump plating processes that are suitable to replace eutectic SnPb. The technical challenges as well as comparisons with regard to SnPb and among these lead-free processes themselves will be discussed.

Key words: flip chip, wafer bumping, electroplating, voiding, tin pest, tin whisker.



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