IWLPC (Wafer-Level Packaging) Conference Proceedings


LOW COST FLIP CHIP SOLUTIONS, C3 AND BEYOND

Authors: Charles E. Bauer, Ph.D. / Alexander Taran
Company: TechLead / Microelec Assembly
Date Published: 10/10/2004   Conference: IWLPC (Wafer-Level Packaging)


Abstract: The invention of flip chip technology nearly 40 years ago heralded a new era of chip connection performance. Unfortunately, only the highest value integrated circuits (ICs) could afford this new and innovative assembly technique. In the past decade several approaches to both lower cost and simplified assembly brought flip chip technology closer to mainstream assembly, but continued process complexity, yield and reliability challenges keep the cost equation for flip chip connection higher than for traditional wire bonding and even tape automated bonding (TAB) for liquid crystal display drivers (LCDs).

Capillary Chip Connection (C3) greatly simplifies flip chip assembly while simultaneously improving reliability, reducing bumping and substrate costs, and expanding metallurgical options for the electrical connection provided. C3 remains compatible with traditional assembly and substrate technologies as well as infrastructure including conventional reflow, thermo-compression reflow assembly on the one hand vis a vis conventional tape and flex circuit technologies on the other hand. In addition, lower cost substrates under evaluation for such applications as RF identification and automotive applications show promise.



Members download articles for free:

Not a member yet?

What else do you get when you join SMTA? Read about all of the benefits that go along with membership.

Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.


Back


SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344 USA

Phone +1 952.920.7682
Fax +1 952.926.1819