PROCESS WINDOW STUDY DETERMINING THE DEFECT-FREE PROCESSING WINDOW FOR SMALL SURFACE MOUNT COMPONENTS USING A RESPONSE SURFACE DESIGN OF EXPERIMENT
Author: Michael Johnston Company: Micron Technology Inc. Date Published: 9/26/2004
Abstract: The integration of smaller surface mount devices requires tighter, more capable surface mount manufacturing procedures for both the solder paste screen-printing and the component placement processes. The purpose of this document is to report the results of a design of experiment (DOE) used to determine the process window for a typical surface mount 0402x4 resistor network. The factors of the DOE include solder paste alignment in the X and Y directions and part placement in the X and Y directions. The result of the process window DOE determined the placement of a 0402x4 resistor network to be a circle, centered at the CAD location with a diameter of 2 mils to attain a process capability index (Cpk) of 1.50.
Keywords: Process window, response surface designed experiment, process capability, surface mount, and defects per million opportunities (DPMO).