Pan Pacific Symposium Conference Proceedings


SOC (SUBSTRATE ON CHIPS) MOLD COMPOUND EVALUATION

Author: C.L. Chung
Company: ChipMOS TECHOLOGIES INC.
Date Published: 1/25/2000   Conference: Pan Pacific Symposium


Abstract: For the current advanced packages, substrates are widely used for the purpose of high frequency (600~800 MHz) and Rambus DRAM application. The SOC package is developed under the concept not only for the above advantages but also small in package size. In this paper, we report the study on mold compound evaluation for SOC(substrate on chips) package.

Prior to molding, substrates were treated by chemical reactive plasma (2.45 GHz) to polarize the solder mask (AUS5) surface of BT substrate. The package (PKG) warpage of SOC was analyzed after PKG singulation using 3-D measurement system (WEGU OMS600) for tracking up to 28 days. Furthermore, the ball shear test reveals the PKG warpage will effect the initial ball shear strength.

In this study, by establishing a dynamic measuring method, warpage variation could be obtained during the cooling process. This also helps in evaluating the solder ball neck internal stress that is the key factor in determining the initial solder ball strength. Finally, prediction of solder joint strength on the SMT applications would be able to make use of the conclusion from the study.

Key Words---BT substrate, solder ball shear strength, mold compound evaluation, Rambus DRAM, high frequency, Package warpage and Real-time PKG warpage measurement.



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