Pan Pacific Symposium Conference Proceedings


1X BROADBAND WAFER STEPPER FOR BUMP AND WAFER LEVEL CHIP SCALE PACKAGING (CSP) APPLICATIONS

Author: Doug Anberg
Company: Ultratech Stepper, Inc.
Date Published: 1/25/2000   Conference: Pan Pacific Symposium


Abstract: In the past, the majority of the lithography processing for bump applications has been performed with contact or proximity aligners. As 8-inch bump and wafer level chip scale packaging (CSP) becomes the driving factor in flip chip applications, packaging facilities are now demanding a more automated, lower defect, and higher reliability lithography tool for these processes and thus are utilizing front-end stepper technology.

This paper describes the performance of a unique new stepper, the Saturn Spectrum 3 Wafer Stepper, which employs a 1X 100nm broadband projection optical system developed in collaboration between Ultratech Stepper and Casio Computer Ltd. specifically for bump and wafer level CSP lithography applications. The optical characteristics of the unique g, h, and i-line projection exposure system will be discussed along with the overall technical system capabilities that provide solutions to the unique bump lithography challenges.

Improvement of the image quality and overlay accuracy in comparison to the traditional lithography tool showing a more robust solution on bump and wafer level CSP applications are discussed. Results obtained by the manufacturing process at Casio Computer LTD on the first Ultratech Saturn Spectrum 3 Wafer Stepper are presented, along with critical dimension measurements and SEM photos of production pattern profiles and overlay data.



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