A COMPARISON BETWEEN POWER AND THERMAL CYCLING FOR A FC PBGAAuthors: Andrew Mawer, D. Hodges Popps, and G. Presas
Company: Motorola Semiconductor
Date Published: 9/21/2003 Conference: SMTA International
The local heating portion can be significant, especially for high power devices, and it can result in large thermal gradients within the package and between the package and board. Although it is more involved and difficult to control than thermal cycling, power cycling where power is applied to the packaged die, is one way of better simulating actual system thermal gradients.
This paper will describe comparative power versus thermal board-level cycling performed on a 119 pin flip chip (FC) PBGA test vehicle between room temperature and 125°C. The solder joints were continuously monitored until >50% failures. The custom system, which provided closed loop control to each device under test to minimize variability amongst the samples, will be described in detail. Failure modes and statistics will also be detailed.
Members download articles for free:
Not a member yet?
What else do you get when you join SMTA? Read about all of the benefits that go along with membership.
Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.