SMTA International Conference Proceedings


FEASIBILITY ANALYSIS METHODOLOGY FOR STACKED-DIE VS. SINGLE-DIE PACKAGE CONSIDERATIONS

Authors: Mark Gerber and Shawn O’Connor
Company: Motorola Semiconductor
Date Published: 9/21/2003   Conference: SMTA International


Abstract: Industry trends have led a number of companies, including Motorola, to investigate the technical and cost trade-offs of single versus stacked-die packaging options. The wide application possibilities for stacked-die packaging across the semiconductor industry has raised the question of when these solutions are best suited for new applications.

Early technical and cost feasibility analyses are critical to understanding the packaging solution benefits and risks as well as highlighting the key technical considerations that can enable the most cost effective and manufacturable solution. Feasibility considerations such as: package area, package & assembly cost, die & assembly yields, substrate design complexity, manufacturability, die aspect ratios, performance, customer requirements and test methodology are areas that need to be investigated to help make early decisions on the type of packaging option that is most suitable for the application being considered.

This paper will discuss the feasibility analysis methodology and considerations for stacked-die versus single-die package options and show a number of ways to mitigate some of the manufacturing risks associated with stacked-die packaging.

Key words: BGA, stacked die, SiP, feasibility, multi-die.



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