Pan Pacific Symposium Conference Proceedings


Authors: A. Brandolini, A. Gandelli and R.E. Zich
Company: Politecnico di Milano
Date Published: 2/18/2003   Conference: Pan Pacific Symposium

Abstract: This paper deals with the design of 3D stacked multi-chips devices including both analog and digital components in the same package. Criteria to define the optimal noise and interference reduction and improve cross-coupling rejection are presented and discussed. Inductive and capacitive coupling between adjacent planes and components are defined by existing design technology and new simulation tools adapted to multi-layer design.

Secondary effects downgrading the final performance of 3D devices are taken into account in order to improve accuracy of final results. Especially the mixing of power devices and control leads to more severe restriction in the component placement and layout arrangement. For this reason the role of advanced simulation tools is fundamental for optimal design. New generation of such instruments represents a valid contribution in the development of complex 3D packaging.

Key words: 3D microelectronics, packaging, EMC, EMI, multichip modules.

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