BALL STACKED PACKAGE DEVELOPMENT FOR HIGH DENSITY DRAM MODULE APPLICATIONSAuthors: Young Gon Kim, Ph.D. and Ji-Bum Kim
Company: Tessera Technologies Hybnix
Date Published: 12/3/2002 Conference: NEPCON West - Fiberoptic Expo
No thermal problems were identified during normal operation scenarios. It is recommended, however, to have either a small amount of airflow or a mechanical protector level heat spreader for greater thermal margins. The four-die stacked package passed 1000 cycles of board reliability test at temperatures ranging from -40 to 125°C.
The 1-GB SODIMM product is the outcome of a joint Hynix/Tessera project using a 512Mb DDR SDRAM device. The target application is high-end laptop computers. The 2-die stacked structure is sufficient to achieve this capacity. In order to provide more application flexibility, module thickness is 3.6 mm. This paper covers structure design, ball-out assignment, chip selection and stacking options, electrical and thermal performance, stacking process, and reliability and failure analysis.
Key words: DDR, DRAM, package, FBGA, electrical performance, thermal performance, 3D package, stacked package, DIMM, and SODIMM.
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