SMTA International Conference Proceedings


Authors: Fonzell Martin and Ken Thompson
Company: Motorola Semiconductor
Date Published: 9/22/2002   Conference: SMTA International

Seika Machinery, Inc.

Abstract: In an effort to save board space and component board attach time, a single package can contain multiple die. Moreover, electrical performance can be improved by reducing the length of the signal lines. Most commonly a laminate based multi-array ball grid array (MAPBGA) or chip-scale package (CSP) is utilized for ease of creating a custom routed multi-die design. However, in order to maintain a footprint, a leaded package can be required to assemble two die.

Manufacturability of two die in a Low Profile Quad Flat Package (LQFP) was evaluated utilizing an interposer, and a standard or custom lead frame. Die to die wire bonding was characterized, in addition to low wire sweep molding compounds. The feasibility of two die in a MAPBGA package was also evaluated, particularly through substrate design.

The reliability performance of the two die LQFP and MAPBGA was also evaluated through moisture sensitivity studies, including die with and without polyimide. In addition, a new process flow was developed to handle assembly of two die in one flow and a cost comparison was made between the multiple die and single die solutions.

Assembly in both a standard and custom lead frame was shown to be effective for the LQFP and work continues with a MAPBGA multi-die package.

Key words: multi-die, die-to-die bonding, BGA, LQFP.

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