SMTA International Conference Proceedings


FLIP CHIP PBGA FOR COMPUTING AND TELECOMM APPLICATIONS

Authors: Andrew Mawer, Thomas Koschmieder, and Diane Hodges
Company: Motorola Semiconductor
Date Published: 9/22/2002   Conference: SMTA International


Seika Machinery, Inc.

Abstract: Flip Chip ball grid array (FC BGA) packages are increasingly migrating to organic or plastic package substrates from the ceramic that was introduced initially [1,2]. These substrates are either based on conventional mechanical drilling and subtractive etching technology, or more commonly, fabricated with high density photo or laser defined vias and additive technologies.

The latter is commonly referred to as High Density Interconnect (HDI) technology. The primary advantages of plastic substrates are the potential for increased board-level reliability, lower weight and lower cost versus ceramic. Coincident with the increased use of organic substrate technology for FC BGA is a move toward bumps other than the traditional IBM developed C4 (controlled collapse chip connection) evaporative technology. Most common among alternate bumps are those formed by stencilprinting and electroplating.

This paper will cover the design and development of FC PBGA based on HDI substrate technology for the computing and telecommunication applications. The package currently either evaporated or electroplated solder bumps, the latter of which allows extension to low alpha for placing bumps over memory and also to Pb-free for meeting future market and legislative demands. Both board and component-level reliability data including moisture preconditioning, will be presented. Common accelerated stressing failure modes observed and overcome during development will be outlined.



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