Journal of SMT Article
INTERCONNECTIONS IN 3 DIMENSIONS FOR HIGH SPEED COMPONENTS
Company: 3D PLUS
Date Published: 4/1/2001 Volume: 14-2
As can be seen on Figure 1, several methods have been used to stack components. Originally, the wafer still exists, and differentiation develops thereafter. Some manufacturers, such as Irvine Sensors and Cubic Memory/VCI, reroute the wafers. Some other companies, such as Sharp Design and 3D Plus, use specific wafers to stack memories by staggered wire bonding. In order to do so, large volumes are necessary, and this technique is currently used in telecom applications.
With regard to bare dice, i.e. after sawing, some differentiation remains depending on the chip being stacked as it is or being plastic packaged. Some distinctions can be made between companies which stack identical bare dice, for instance NEC and 3D PLUS, and companies which stack heterogeneous chips, such as Irvine Sensors and 3D PLUS.
As far as packaged dice are concerned we can mention two families: companies which stack standard packages (TSOP), such as Dense-pak, IBM, Hitachi and 3D PLUS; and companies which stack custom plastic packages, such as Stak-Tek and Samsung. This analysis shows that stacking of standard components (bare dice or plastic packages) results in a very low cost.
Members download articles for free:
Not a member yet?
What else do you get when you join SMTA? Read about all of the benefits that go along with membership.
Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.