Journal of SMT Article


Author: Arun Gowda et al.
Company: GE Global Research
Date Published: 1/1/2006   Volume: 19-1

Abstract: Chip Scale Packages (CSPs) offer savings in real estate and cost, performance improvements, and compatibility with standard surface mount processes. Over the past few years, numerous CSP designs and formats have entered the market to meet specific end use applications. In addition, legislation to eliminate lead in electronics has driven the development of lead-free CSPs.

Mature rework processes are needed to facilitate the smooth transition to lead-free electronics packaging and manufacturing. The diverse nature of the CSP formats and the assemblies they are employed in necessitates the development of package and assembly specific rework processes.

In this paper, the development of rework processes for several representative lead-free chip scale packaging types, along with processes for their tin-lead counterparts, are described. The reliability of the reworked assemblies is briefly discussed in comparison to the non-reworked CSP assemblies. Additionally, process and reliability challenges with reworking lead-free CSPs are summarized.

Key words: chip scale package, lead-free, rework.

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