SMTA International  

Conference: Sep. 27 - Oct. 1, 2015  
Exhibition: Sep. 29 - 30, 2015  

Donald Stephens Convention Center  
Rosemont, IL  


Half day (3.5 hours) educational courses are led by internationally respected professionals with extensive experience in the subject area. Course instructors deliver focused, in-depth presentations on topics of current importance to the industry, based on their research and industry experience. Tutorials are application oriented and structured to combine field experience with scientific research to solve everyday problems. Tutorials are offered on Sunday, Monday, and Thursday to provide you the opportunity to attend the conference sessions and visit the exhibit floor.

Tutorial registration includes breaks, course materials, and a Certificate of Attendance.
Biographies for all instructors are available.

SUNDAY, September 28, 2014


Solder Reflow Fundamentals - NEW!

Fred Dimock, BTU International
Sunday, September 28 | 8:30am - 12:00pm
Room 50

Course Objectives
This class focuses on the fundamentals of solder reflow and reflow oven operation. It is designed for new SMT engineers/technicians or current ones that want a better understanding of the reflow process. It will discuss recipes vs. profiles, heat transfer and oven control, why profiles are shaped the way they are and how to obtain profiles. Additional topics of discussion include TC accuracy and mounting, profilers, test vehicles, eutectic vs. lead-free process windows, and process repeatability.

Topics Covered

  • Recipe vs. Profile
  • Material properties
  • Why profiles are shaped like they are
  • Obtaining profiles
  • TC accuracy and attachment
  • Profilers
  • Test vehicles
  • Process window
  • Eutectic vs. Lead Free
  • Heat transfer
  • Oven control
  • Oven options
  • Process repeatability
  • Quick CpK lesson
  • Variability within/among


    Advanced Rework: Hands-on BGA Reballing, Leadless Devices and Fine-Pitch Parts - NEW!

    James Barnhart and Norman Mier, BEST, Inc.
    Sunday, September 28 | 8:30am - 12:00pm
    Room 51

    Course Objectives
    This course is designed for those seeking advanced rework skills on BGA, leadless devices and fine-pitch component rework. It is unique in that both theoretical and practical skills are demonstrated in the classroom.

    Topics Covered

  • Methods, materials and processes for reballing components
  • Plastic and ceramic BGA device reballing
  • Rework of bottom terminated components
  • Methods, materials and processes for reworking bottom-terminated components
  • Rework of fine-pitched components via paste printing and hand soldering
  • Assembly processes for lead free and tin-lead


    Conformal Coating Applications, Inspection, Rework & Quality Control - NEW!

    Bob Willis,
    Sunday, September 28 | 8:30am - 12:00pm
    Room 52

    Course Objectives
    Conformal coating has provided benefits to industry for many years either in the high reliability market sector or where products have to deal with extreme environmental conditions or simply for use in consumer applications. The use of coatings is seen in different industries. Telecommunications, automotive and consumer products have benefited from the use of selective coating but for different reasons. This practical course provides a simple guide to the use of coatings, their application and process, product benefits, inspection and quality control.

    Each delegate will also receive a FREE set of color Inspection Wall Charts covering coating application and common defects to use on their manufacturing shop floor. During the course there are opportunities to win some of Bob's interactive Conformal Coating CD-ROMs for the best questions in the session.

    Topics Covered

  • Why conformal coat
  • Clean or no clean
  • Coating material options
  • Coating process options
  • Cost of coating assemblies
  • SIR and cleanliness testing
  • Cleanliness testing methods
  • Reliability of coating
  • Testing and evaluation of coatings
  • Correct design for coating
  • Masking options and methods
  • Inspection and quality control of coating
  • In-house or contracting services
  • Inspection of coatings and methods
  • Rework and repair of board assemblies


    Tin Whiskers - What's Important to Know - NEW!

    Jennie Hwang, Ph.D., H-Technologies Group
    Sunday, September 28 | 8:30am - 12:00pm
    Room 53

    Course Objectives
    Concerns about tin whiskers have been intensifying recently, although tin whiskers have been recognized for more than six decades in electronic, electrical and industrial applications. Metal "whiskering" is an intricate, atomic level process. While the understanding of tin whisker has advanced, yet the myth exists. This course offers a holistic coverage, from practical perspectives, of all important aspects of tin whisker with emphasis on mitigating the risk by considering the factors that affect tin whisker growth and examining the preventive and remedial solutions. The course also outlines the distinctions of tin whisker from metal dendrites, electro-migration, tin pest and other processes, as well as the practical tin whisker criteria for reliability implications in both SnPb and lead-free environments.

    Topics Covered

  • Metal whisker vs. tin whisker
  • Tin whisker vs. tin pest
  • Whiskers vs. dendrites
  • Whisker-resistant vs. whisker-proof
  • Lead-free solder vs. tin whisker
  • Definition and clarification
  • Physical phenomena
  • Reference point
  • Causes and factors
  • Concerns and impact
  • Reliability implications
  • Test conditions and challenges
  • Mitigation remedies
  • Relative effectiveness of remedies
  • Plausible theory
  • Summary


    The 5 Boogiemen of Lead-Free Soldering Processes - NEW!

    David Hillman, Rockwell Collins
    Sunday, September 28 | 1:30pm - 5:00pm
    Room 50

    Course Objectives
    This course will cover the "5 Boogiemen" of lead-free soldering processes. As the electronics industry gains experience and lead-free soldering processes achieve maturity, the primary material and process issues are established. The root cause of each of the problem topic areas will be covered and solutions to either eliminate or mitigate their occurrence will be discussed.

    Topics Covered

  • Head on Pillow (HOP)
        • Non-Wet Opens (a close cousin)
  • Pad cratering
  • Mixed metallurgy
  • Copper dissolution
  • Tin whiskers


    BMC (Bottom Mounted Component) LGA (Land Grid Array) QFN (Quad Flat No-lead)" - How to Improve Your Process Yields - NEW!

    Bob Willis,
    Sunday, September 28 | 1:30pm - 5:00pm
    Room 52

    Course Objectives
    LGA/QFN have fast become a common package used in many professional portable products, however due to the cost advantage they will become the replacement package for many semiconductors. With any new package type there is always a learning curve for design, process and quality engineers who have to get to grips with the challenges that these packages bring. Moving from one row of terminations to three adds to the complexity and challenges. Each step of the implementation process for LGA/QFN devices will be reviewed along with results of practice process trials with these devices. We show you how to improve your process yields with simple hands on tricks of the trade.

    Included with this course will be a FREE set of optical and x-ray inspection charts for each delegate to use in manufacture. The instructor is well known for his practical workshops and supported by his unique process video experiments, LGA/QFN are guaranteed to come alive.

    Topics Covered

  • Component package types and faults
  • Component construction
  • MSD handling levels
  • Solderability testing packages
  • PCB layout on rigid and flexible circuits
  • Solder mask layout options
  • Lead-free stencil printing options
  • Placement and component packaging
  • Convection and vapor phase soldering yields
  • Visual inspection criteria
  • X-Ray inspection criteria
  • Cleaning under packages
  • LGA/QFN rework and replacement
  • Array solder joint reliability
  • Process problems and solutions


    Next Generation High Density PCB Structures and Applications - NEW!

    Happy Holden, Gentex Corporation (Retired)
    Sunday, September 28 | 1:30pm - 5:00pm
    Room 51

    Course Objectives
    This course will provide an overview of the Next Generation of High Density PCB Structures and Materials. As a follow-up, the Advanced SMT Applications of Embedded Components and optical waveguides in PCBs will be reviewed that require these newer high-density structures and will end with an overview of the Signal Integrity, high-frequency advantages of these new structures and substrates.

    Topics Covered

  • Introduction
  • 2nd and 3rd generation of High-Density Interconnect structures
  • Embedded component technologies in Asia, US and Europe
  • Optical waveguides in PCBs
  • The signal and power integrity advantages of new high-density structures


    Shock-Impact Reliability of Portable Electronics - NEW!

    Pradeep Lall, Ph.D., Auburn University
    Sunday, September 28 | 1:30pm - 5:00pm
    Room 53

    Course Objectives
    Portable electronics such as smartphones, tablets and laptops may be subjected to shock and vibration in transportation handling and normal usage. Fine-pitch electronic components are placed in ever closer vicinity of the product housing. The products may be dropped from ear-level, waist-level or desk-level depending on application. Electronic components may be subjected to several thousand-g's of acceleration often causing damage to interconnects and silicon devices mounted on the circuit-board in addition to LED displays. Presently, the JEDEC test standard JESD22-B111 is used to test component robustness. However, ensuring robustness of products in shock-impact is more involved comprising decisions regarding modeling of individual components, interfaces, board assemblies, housing materials and interactions. An analyst must make decisions regarding model complexity, constitutive behavior, initial conditions and multi-surface contact during the drop event. High-speed experimental techniques are needed to capture the event.

    Topics Covered

  • Approaches for measurement of shock-level in products
  • High-speed strain measurement
  • Methods for data analysis
  • Methods for modeling board assemblies subjected to shock-impact
  • Model development for portable products
  • Algorithms for data reduction and parameter extraction
  • Approaches for life prediction
  • Statistical assessment of uncertainty of system survivability in mechanical shock


    Effective Strategies for Selecting and Qualifying Assembly Process Materials - NEW!

    Cheryl Tulkoff, DfR Solutions
    Monday, September 29 | 8:30am - 12:00pm
    Room 53

    Course Objectives
    Contamination and cleanliness issues are believed to be one of the primary drivers of field issues in electronics today. Combined with environmental stressors, contamination can induce corrosion and metal migration (electrochemical migration – ECM). Through awareness of the issues, proper design, appropriate material selection and process control, companies can successfully qualify processes in high reliability products. Without proper planning, however, these processes can lead to a path of ruin.

    Topics Covered

  • Design considerations
  • Soldering material selection criteria: pastes, fluxes, wires, adhesives
  • Cleaning material selection criteria: DI water, saponifiers, surfactants
  • Equipment considerations: ovens, cleaners, hand tools, coating and potting
  • Material selection criteria process
  • Validation, monitoring, and control
  • Relevant Industry standards
  • Case studies


    SMT Process Fundamentals for Tin-Lead and Lead Free Assembly

    S. Manian Ramkumar, Ph.D., Rochester Institute of Technology
    Monday, September 29 | 8:30am - 12:00pm
    Room 50

    Course Objectives
    This course will provide an introductory but holistic understanding of the surface mount and mixed technology assembly processes for lead based and lead-free electronics packaging. Topics include PCBs, assembly types, component types, assembly process, assembly materials, identification of defects, troubleshooting and process control. Design for ease of manufacture and assembly will be discussed throughout the lecture. Tradeoff decisions between different materials and equipment types will also be highlighted. A comparison of lead based and lead free process will be provided, including implementation issues.

    Topics Covered

  • Electronics packaging and levels
  • PCB types, materials and manufacturing
  • Overview of Through Hole Technology
  • Overview of Surface Mount Technology
  • Stencil printing
  • Adhesive dispense
  • Component placement
  • Soldering
  • Cleaning materials, process, and testing for cleanliness
  • Inspection techniques, assembly defect identification and corrective action
  • Testing of PCB assemblies
  • Rework and repair


    Stencil Printing - A Practical Guide to Defect Prevention and Yield Improvement - NEW!

    Chrys Shea, Shea Engineering Services
    Monday, September 29 | 8:30am - 12:00pm
    Room 51

    Course Objectives
    This brand new course begins with the basics of SMT solder paste stencil printing and ends with the latest research in stencil printing tools and technologies. The class starts with a quick description of printing fundamentals: solder paste characteristics and behaviors, the mechanics of the process and importance of a good setup, and the relationship between aperture sizes and paste deposit formations. It then progresses rapidly into troubleshooting techniques for both general and specific printing issues, and addresses problem prevention through proper stencil design and selection. Moving into advanced technology topics, the course reviews the last four years of independent research on stencil materials, manufacturing processes and nanocoatings, and closes with an update of automated Solder Paste Inspection (SPI) technologies, applications and special features. Attendees are encouraged to ask questions or bring specific problems to the class for suggestions and inputs.

    Topics Covered

  • Solder paste
  • Mechanics of the printing process
  • Troubleshooting process problems
  • Stencil design
  • Stencil materials and manufacturing processes
  • Automatic Solder Paste Inspection (SPI)
  • Review and Q&A


    Properties and Applications of Low Temperature Solders - NEW!

    Ning-Cheng Lee, Ph.D., Indium Corporation
    Monday, September 29 | 8:30m - 12:00pm
    Room 54

    Course Objectives
    Since the dawn of the electronic industry, the soldering process has encompassed mainly component manufacturing and printed circuit board assembly, with a hierarchic solder melting range. Components are made using solder alloys with melting temperatures around 300°C, which will not melt in the subsequent PCB assembly process, where the solders typically melt around 200°C. Low-temperature solders, with melting temperatures less than 170°C, are currently used mainly for niche applications. However, the iNEMI roadmap predicts low-temperature soldering to become a mainstream processes by 2017. Low-temperature soldering is greatly desired for assemblies such as heat-sensitive devices, systems with more hierarchic levels, parts with significant differences in their coefficients of thermal expansion, components exhibiting severe thermal warpage, or products with highly miniaturized design. This course will cover several varieties of low-temperature solders with an emphasis on lead-free alloys, their physical, mechanical, and soldering properties, and the applications involved with those alloys.

    Topics Covered

  • Design of low temperature solder alloys
  • In-bearing systems and their properties
  • Bi-bearing systems and their properties
  • Recent development in Bi-bearing low temperature alloys
  • Mechanisms of reliability enhancement of new Bi-bearing alloys
  • Applications of low temperature solders


    Considerations In On-Shoring/Regionalizing Electronic Assembly - NEW!

    Phil Zarrow, ITM Consulting
    Monday, September 29 | 8:30am - 12:00pm
    Room 52

    Course Objectives
    This course will familiarize the participants with the techniques and methodologies for evaluating, selecting and working with North American contract assemblers. This course provides participants with an understanding of the outsourcing process from start to finish. It reviews PCB design principles, basic assembly processing, supplier selection concerns and the fundamentals of maintaining a successful and on-going relationship with the chosen suppliers. Checklists for both qualifying and for on-going evaluation of contract assemblers are provided and key to the seminar. This course gives knowledgeable insight into the behind-the-scenes activity at the contract manufacturer as well as an unbiased view of typical procurement activities.

    Topics Covered

  • Advantages of re-shoring/regionalization of electronic manufacturing to North America
  • Contract manufacturer selection criteria and considerations
  • Outsourcers' perspectives of, and issues with, contract assembly
  • Optimizing the contract assembly relationship
  • Contract assembly qualification checklist
        •Business Structure


    Fundamental Methodologies and Strategy for Embedding Passive and Active Components - NEW!

    Vern Solberg, Solberg Technical Consulting
    Monday, September 29 | 1:30pm - 5:00pm
    Room 53

    Course Objectives
    Both uncased active and passive component elements are candidates for embedding but the decision to embed components within the multilayer circuit structure must be made early in the design process. Some components are easy candidates for integrating into the substrate while other may involve more complex processes and will be difficult to rationalize. Although a majority of the discrete passive and active devices may remain mounted on the outer surfaces of the multi-layer board, embedding one or more silicon based semiconductor elements within the inner layers of the structure will enable greater utilization of the circuit boards outer surfaces.

    Topics Covered

  • Embedded component PCB development
        • Layout strategy
  • Materials and process methodologies
  • Embedded component PCB fabrication process variations
        • Embedded component PCB development
        •PCB supplier selection
        •Land pattern development
        •Component termination guidelines
        •Plating and coating alternatives
        •Component attachment process
        •Preparation for component placement
        •Assembly process variations for passive components
        •Preparation for embedding active die elements
        •Assembly process variations for active die elements


    Advanced Component Packages and Processes

    S. Manian Ramkumar, Ph.D., Rochester Institute of Technology
    Monday, September 29 | 1:30pm - 5:00pm
    Room 50

    Course Objectives
    This course will identify and categorize the advanced component packages, their nomenclature and construction, and packaging trends. Discussions will relate to miniature and embedded passive technologies, their assembly process, and IC packaging technologies. Participants will be provided an understanding of substrates, substrate requirements, and means for thermal management with advanced packages. Benefits and issues of various advanced IC packages including the assembly process requirements will be introduced. Specific packages to be discussed include Quad Flat Pack No Lead (QFN), Area Array Packages (BGAs, CSPs, Wafer Level CSPs, Package-on-Package, CGAs and Flip Chips), and Multi Chip Modules (MCM). A brief discussion of equipment requirements for advanced component assembly will also be included.

    Topics Covered

  • Introduction
  • Electronics packaging & levels
  • Small and embedded passive component technology
  • Active SMT components
  • High Density Interconnects
  • Ball grid array (BGA) packages
  • Plastic BGA
  • Ceramic BGA (CBGA)
  • Tape BGA (TBGA)
  • Super BGA
  • Chip scale packaging (CSP)
  • Wafer level packaging & I/O redistribution
  • Package-on-Package (PoP) assembly
  • Flip Chip Attach
  • Ceramic Column Grid Array (CCGA)
  • Multi-Chip-Module (MCM)
  • System-In-Package (SIP)
  • MEMS packaging


    Reliability of Lead-Free Assemblies and Failure Analysis

    Martin Anselm, Ph.D., Universal Instruments Corporation
    Monday, September 29 | 1:30pm - 5:00pm
    Room 54

    Course Objectives
    As reliability requirements increase, especially for defense and aerospace applications, the need to characterize component and materials used in electronic assembly also increases. OEM and EMS companies look to perform characterizations as early as possible in the process to be able to limit quality related issues and improve both assembly yields and ultimate device reliability. Higher stress conditions in RoHS compatible products and increased package densities tend to cause premature failures. In addition, a review of lead-free laminate selection and testing procedures will shed some light on the question, "Can your board withstand 9x reflow?"

    Topics Covered

  • Major difficulties in lead-free reliability testing
  • Mixed alloy assembly best practices
  • PCB plating considerations
  • The role of failure analysis in production and research
  • Analytical testing techniques
  • Root causes of production failures
  • Failure analysis studies - fine-pitch printing, PoP, 01005 defects, and high Tg laminate failures


    3D IC Packaging and 3D IC Integration - NEW!

    John Lau, Ph.D., ASM Pacific Technology
    Monday, September 29 | 1:30pm - 5:00pm
    Room 51

    Course Objectives
    3D IC integration is taking the semiconductor industry by storm. It has been: (a) impacting the chip suppliers, fab-less design houses, foundries, integrated device manufacturers, outsourced semiconductor assembly and test, substrates, electronic manufacturing service, original design manufacturers, original equipment manufacturers, material and equipment suppliers, universities, and research institutes; (b) attracting the researchers and engineers from all over the world to go to conferences, lectures, workshops, panels, and forums to present their findings, exchange information, look for solutions, learn the latest technologies, and plan for their future; and (c) pushing the industry to build standards, infrastructures, and ecosystems for 3D IC integration. This is a perfect storm! People think that Moore's law is going to roll off soon and 3D IC integration can be the solution. In order to prepare for the future and have competitive edges, companies and research institutes have been investing heavily in both human and physical resources for 3D IC integration. The potential applications and high volume manufacturing of 3D IC integrations can be classified into 4 groups, namely; memory-chip stacking, wide I/O memory (or logic-on-logic), wide I/O DRAM (or hybrid memory cube), and wide I/O interface (or 2.5D IC integration). The design, materials, process, reliability and supply chains for manufacturing these 4 groups of 3D IC integration will be presented and discussed. Emphasis is placed on the ownerships of the technology supply chains such as the FEOL (front-end-of-line), MOL (middle-of-the-line), BEOL (back-end-of-line), TSV (through-silicon via), MEOL (middle-end-of-line), and package assembly for these 4 groups of potential 3D IC integration manufacturing. 3D IC packaging such as stacking chips with wirebondings, package-on-package (PoP), chip-to-chip interconnects, embedded passives and actives, and fan-out WLP will be mentioned first.

    Topics Covered

  • Introduction
  • 3D IC packaging without TSVs
  • CMOS Image sensor with TSVs
  • MEMS with TSVs
  • TSV technology
  • Microbump technology
  • Thin-wafer handling technology
  • 3D IC integration with TSVs
  • 2.5D IC integration with TSVs
  • Design for cost, performance, power and reliability
  • Supply chain and ownerships for 2.5D/3D IC Integration
  • Summary
  • Q&A


    Design for Manufacturing (DFM): New Solutions for Today's Challenges - NEW!

    Dale Lee, Plexus Corp.
    Monday, September 29 | 1:30pm - 5:00pm
    Room 52

    Course Objectives
    Traditional DFM for electronic assembly has been to match the product design to the assembly process. With today's designs containing a wide diversity of technologies, this is not practical. This course will familiarize the participants with limitations of industry standards, assembly tolerances, material compatibility, methodologies and introduce the concept of matching the assembly process to the design or DFMP. Topics included will be PCB design impacts on assembly, PCB fabrication, and solder process constraints. Including several examples of actual product design, manufacturing tooling design, and SMT & PTH assembly process matching failures.

    Topics Covered

  • Elements of global product design process
  • Printed circuit board design impacts
  • SMT solder process design impacts: thermal balance, trace routing, process tooling design, assembly equipment limitation/tolerance
  • Through hole component solder process design Impacts: thermal connection, hole size, pad design
  • Cleaning impacts
  • Compatibility issues - low stand-off components (LGA, QFN)

    FREE half day course for SMTA MEMBERS!
    You are required to register to receive a handout and a Certificate of Completion, but there is no charge for the course. (Non-member rate applies.)


    Reliability 360-How to Verify Design Robustness Early In the Process - NEW!

    Cheryl Tulkoff, DfR Solutions
    Thursday, October 2 | 8:30am - 12:00pm
    Room 47

    Course Objectives
    In today's fast-paced, highly competitive electronics market, producing reliable products is critical to a company's success. Business case studies have consistently shown that performing comprehensive design reviews during product development is the only proven method for ensuring a reliable product. Most companies have some type of design review process, but some fairly straightforward enhancements can drive substantial product improvements. Verifying design robustness early in the process is both effective and efficient and can easily be incorporated into existing design review processes. This course will cover how to use a new or existing Design Review Process to truly Design for Reliability and verify robust design. A five step execution plan with tailoring to different markets will be discussed. The five steps will incorporate Physics of Failure, electrical, mechanical, thermal, testing, and manufacturability topics.

    Topics Covered

  • Initial reliability assessment: performed by subject matter experts (SME)
  • Limited 1st order physics of failure (PoF) based simulation based on SME identification of critical components: algorithms (Coffin-Manson, Steinberg, etc.) Identified in industry standards (IPC SM-785, VITA 51.2, JESD47)
  • Comprehensive 1st order PoF-based simulation: automated design analysis
  • Full 3D FEA simulation: Abaqus, ANSYS, or others
  • Test plan development & execution

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