Tutorials

3.) Active SMT Components

4.) Ball Grid Array (BGA) Packages

5.) Plastic BGAs

6.) Ceramic BGA (CBGA)

7.) Tape BGA (TBGA)

8.) Super BGA

9.) Chip Scale Packaging (CSP)

10.) Wafer Level Packaging & I/O Redistribution

11.) Package-on-Package (PoP) Assembly

12.) Flip Chip Attach

13.) Ceramic Column Grid Array (CCGA)

14.) Multi-Chip-Module (MCM)

15.) System-In-Package (SIP)

16.) MEMS Packaging

Flip Chip Technology and Processing – What, Why & How

Course Objectives
Flip chip assembly technology is gaining increased acceptance in the electronics industry. Annual growth rates projected through the next decade are 30% or higher. While flip chip technology was developed over forty years ago by IBM, it has only recently began to gain market share in the semiconductor packaging and surface mount module industries.

Topics Covered
What:

Why:

How:

3D Packaging, Interconnect, and Assembly

Course Objectives
After more than a decade the industry continues to recognize the power of the third dimension in package, sub-system and system assembly for the implementation of highly integrated electronic products. 3D assembly and packaging of both active and passive devices opens a new world of performance and integration to system designers. Numerous approaches reported and demonstrated include those based on package stacking (package-on-package, origami, and edge stacked modules) and those based on die stacking (wire bond, mixed technology, edge redistribution, interposers, and through-silicon-via or TSV).

TSV and interposer technologies stand out from the others as 3D device integration approaches as opposed to 3D packaging methods. Consequently, through silicon via technology and interposers present unique opportunities and challenges. For example, TSVs promise unrivaled performance improvements due to short, low impedance interconnect and high silicon efficiency. On the other hand, no other 3D approach disrupts the existing supply chain so dramatically.

Updated annually to include the latest developments, this course covers both fundamental and advanced technologies that today produce stacked chip packages and assemblies as well as stackable packages for implementation of highly integrated electronic products. These include the challenges of die thinning, thin die handling and attachment, multi-level wire bonding, mixed technology die attachment and bonding, flip chip, TAB and TSV technologies. Substrate selection for various 3D packaging techniques including silicon tiles, flex circuit origami and specialty interposers concludes the chip stacking section of the course. Several examples of specific 3D package structures demonstrate both the power and limitations of these approaches.

Package on Package (PoP) SMT assembly processes include flux dip and paste dip, the challenges of fine pitch printing, placement and reflow of PoP packages and warpage control in multi-level packages inspection and rework of multilevel package assemblies. The instructors also identify common defects occurring in PoP and 3D package assembly such as head-on-pillow, no-wet opens, chip flex, etc. as well as their prevention and repair.

Further considerations for 3D electronics include stackable packages based on flex and rigid substrate approaches, integrated system-in-package techniques and multilayer, embedded passive technologies. Additional coverage of SMT design and assembly implications rounds out the technical content of the course. Using multiple examples of 3D packages in actual usage today, the course also presents a review of the drivers, economics, and intellectual property landscape behind 3D packaging.

Topics Covered

SUBSTRATES - Sunday

Electrochemical Migration and Conductive Anodic Filament (CAF) Formation

Course Objectives
Electrochemical migration (ECM) is the movement of an ionic species under the influence of a DC voltage. This course will present the factors which affect ECM and the failure modes that it can produce. Test methods that will be discussed include surface insulation resistance (SIR), electrochemical migration (ECM) and a quantitative copper corrosion test, developed by Dr. David Bono and modified by the presenter. A special case of ECM is CAF formation. This failure mode will be discussed in detail and the chemistry of the filament will be explained. The effect of processing chemicals, board design, etc. will also be included.

Topics Covered

Design and Assembly Process Principles for Flexible and Rigid Flex Circuits

Course Objectives
The design guidelines for flexible circuits, although similar to rigid circuits, are somewhat unique. In essence, flex-circuits furnish unlimited freedom of packaging geometry while retaining the precision density, and repeatability of printed circuits. Flex-circuits typically replace the common hard-wire interface between electronic assemblies. The flexible circuits, however, have significant advantages over the hard-wired alternative because they fit only one way, eliminate wire routing errors, and save up to 75% on space and weight. Because the flex-circuit conductor patterns can maintain uniform electrical characteristics they contribute to controlling noise, crosstalk, and impedance. The flex-circuits will often be designed to replace complex wire harness assemblies and connectors to further improve product reliability.

During the workshop program participants will have an opportunity to review and discuss base material sets, alternative fabrication methodologies and SMT-on-flex assembly processes. The workshop will also include practical supplier recommendations for ensuring quality, reliability and manufacturing efficiency.

Topics Covered
1. Applications and use environment

2. Material and component selection

3. Design guidelines for flexible and rigid-flex circuits

4. Assembly processing of flex and rigid-flex circuits

MANUFACTURING AND ASSEMBLY - Sunday

SMT Process Fundamentals for Tin-Lead and Lead Free Assembly

Course Objectives
This course will provide an introductory but holistic understanding of the surface mount and mixed technology assembly processes for lead based and lead free electronics packaging. Topics include PCBs, assembly types, component types, assembly process, assembly materials, identification of defects, troubleshooting and process control. Design for ease of manufacture and assembly will be discussed throughout the lecture. Tradeoff decisions between different materials and equipment types will also be highlighted. A comparison of lead based and lead free process will be provided, including implementation issues.

Topics Covered
1.) Electronics Packaging & Levels

2.) PCB Types, Materials and Manufacturing

3.) Overview of Through Hole Technology

4.) Overview of Surface Mount Technology

5.) Stencil Printing

6.) Adhesive Dispense

7.) Component Placement

8.) Soldering

9.) Cleaning Materials, Process, & Testing for cleanliness

10.) Inspection Techniques, Assembly Defect Identification and Corrective Action

11.) Testing of PCB Assemblies

12.) Rework and Repair

Ball Grid Array: Principles and Practice

Course Objectives
Ball Grid Array (BGA) is one of many surface mount components but it brings unique challenges in both design and assembly of the mixed assembly products. There is great interest in BGA because it offers so many benefits such as real estate savings, high yield and better electrical performance. Despite these promises, there are many problems in BGA and CSP (Chip Scale Packaging). The need to implement lead free simply compounds the problem due to intentional or unintentional mix of tin lead and lead free components on a mixed assembly board.

This course is based on Ray's book Surface Mount Technology: Principles and Practice, Second Edition, and IPC standard the latest version (April 2008) of IPC-7095 (Design and Assembly of BGA) currently chaired by Ray.

This is not a theoretical course. It is based on Ray’s years of experience in successfully implementing SMT at Boeing and Intel, and various clients. This course deals with "real-world" problems in SMT and BGA. For example, why moisture and warpage are more of a concern BGA than in any other type of SMT components, how are DFM guidelines different for BGA than for other SMT components and how are they affected by ball size, pitch and I/O count, how to improve paste transfer when you have both higher pitch SMT components with a lower pitch CSP/BGA on the same board.

How do you really inspect and repair BGA and what to do about backward and forward compatibility issues when you have no choice but to deal with tin-lead and lead free BGA on the same board. And what are some of the major defects such as ball drop, smiling and frowning BGA and black pad in BGA and how to deal with them. And you will learn everything you wanted to know about voids but were afraid to ask about various types of voids in BGA, their impact and their minimization and acceptance criteria to meet industry standard. And is BGA the end of the road? What is after BGA? You will also get an insight into the interdependency of design and manufacturing to achieve higher yield, lower cost and faster time to market.

Topics Covered

The “Deadly Sins” of SMT and Lead-Free Assembly

Course Objectives
Everyone has heard of the “7 Deadly Sins” that will, supposedly, lead one to Hell. There are also the “Deadly Sins” of SMT - there are more than just 7 – and they can make your assembly process a “hell on earth”.

During the course of our assembly process audits and troubleshooting work, we tend to see trends in the types of errors and problems. In other words, a lot of people are making the same mistakes. The resulting process problems wreak havoc with an impact on assembly yields ranging from 5 to 20%. In addition to this direct cost, there is also additional financial impact with regard to time spent reworking and repairing, the on corrective action by QC, Engineering and Management, and, of course, “do-over”.

This workshop identifies the “deadly sins” of SMT assembly, both for Pb-free and “leaded” processes. Besides the symptoms and consequences of each type of error, root-cause, rectification and prevention techniques will be presented. Best Practices will be discussed for each of the key process steps. The workshop will, thus, provide the participant with an understanding of how to identify and correct the most common SMT assembly problems. It will include identification of vendor and source problems including components and materials as well as design related problems.

Topics Covered

MANUFACTURING AND ASSEMBLY - Monday

SMT Manufacturing: Preventing Production Defects and Failures – Part 1

Course Objectives
Considering the new and anticipated developments in packaging and assembly, to set the goal to achieve high yield production and to produce reliable products, this course addresses the prevalent issues occurring on the production floor, which likely decrease the yield, increase the cost and jeopardize reliability. The course focuses on “how-to” prevent the issues and take remedial measures through the understanding of potential causes. Specific defects associated with BTCs and PoPs will also be outlined. The morning session (Part 1) will discuss the deficiencies and defects related to solder joints and soldering, and the issues related to components and PCB bare board will be discussed in the afternoon session (Part 2). Attendees are encouraged to bring their concerns for discussion.

Topics Covered

Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World

Course Objectives
Bottom Termination surface mount Components (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface to surface interconnections. BTCs are like BGAs but without the balls. This minor difference in the physical I/O shape makes all the difference in design, assembly and rework between BTCs and BGAs.

Since there are no leads or balls in BTCs to take up any slack from package or board warpage, you essentially need perfection in design and assembly process. When was the last time you saw everything perfect on any manufacturing floor?

One must also keep in mind that these parts are not the only components that must be mounted on the board. Look at any board. It will have other packages such as BGAs, fine pitch and even some through-hole components; and those components have their own unique design and assembly implementation requirements. So designing for BTCs may involve trial and error and lot of frustration by many companies. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead Free has compounded the designer’s task.

When it comes to inspection, BTCs pose even more challenge than BGAs. What you may see in visual inspection may look bad but may really be acceptable. And what you don’t or can’t see may really be critical. And the fact that the Process Engineer must worry about both too much solder and too little solder on the same BTC package makes the quality engineer nervous about field returns.

The objective of the course is to get away from the trial and error approach and provide you successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes. This course is based on Surface Mount Technology: Principles by Ray Prasad and Practice and IPC 7093 Design and Assembly Process Guidelines for BTCs also co-chaired Ray. This course identifies many of the characteristics that influence the successful implementation of robust and reliable BTC assembly processes.

This is not a theoretical course. It Is based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients and deals with "real-world" problems in lead free and tin-lead BTC implementation.

Topics Covered
Introduction

Major Design Considerations for BTCs

Assembly Process Guidelines for BTC

Key strategies in design and manufacturing processes to prevent field returns

Key Issues of High-Speed Digital Design

Course Objectives
The objective of this course is to provide the attendee with the knowledge to do it right the first time. The course provides tools for recognizing the problems with any proposed high-speed design. Design rules and design processes are taught that insure the PCB will function properly at the prototype stage. The course emphasizes cost competitive design without sacrificing high-speed integrity.

Topics Covered
Digital signal edge rate, frequency, and harmonic content

Ground Bounce

Transmission Lines (TL) and lumped circuits

Characteristic impedance (Zo), microstrips, striplines, EM fields, and land-trace geometries

TL Characteristics and Analysis

Signal degradation due to the capacitive load

Crosstalk

Terminations

Bypassing

Power Delivery

Connectors

Source Synchronous Clocking

Design for Manufacturing (DFM): Impacts to Achieving High Yield Process with Today's PCB and Component Packaging

Course Objectives
Today’s PCB and assembly design tolerances, materials and component packaging technologies have impacted traditional assembly processes with very tight solder application, component placement and soldering constraints. Using traditional assembly and soldering process controls are insufficient to achieve a high yielding manufacturing process. This course will introduce the element of matching the assembly/soldering process to the requirements in the product design. Examples of several opportunities within this process for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching and environmental controls that can impact manufacturing yields will be presented.

Topics Covered

SMT Manufacturing: Preventing Production Defects and Failures – Part 2

Course Objectives
Considering the new and anticipated developments in packaging and assembly, to set the goal to achieve high yield production and to produce reliable products, this course addresses the prevalent issues occurring on the production floor, which likely decrease the yield, increase the cost and jeopardize reliability. The course focuses on “how-to” prevent the issues and take remedial measures through the understanding of potential causes. Specific defects associated with BTCs and PoPs will also be outlined. The morning session (Part 1) will discuss the deficiencies and defects related to solder joints and soldering, and the issues related to components and PCB bare board will be discussed in the afternoon session (Part 2). Attendees are encouraged to bring their concerns for discussion.

Topics Covered

Implementing High Reliability Lead-Free Assembly and Test Methodology - NEW!

Course Objectives
This course will discuss essentials for successfully implementing High Reliability Lead-Free Assembly and Test Methodologies for use with high complexity, mission critical electronics. Technical elements and course content will be presented using Lead-Free Technology Case Studies.

Topics Covered

QUALITY AND RELIABILITY - Monday

Failure Analysis: Lessons Learned in Manufacturing and Research

Course Objectives
Universal Instruments Corporation’s Advanced Process Laboratory has observed countless failures in electronics manufacturing. From fine pitch printing, to PoP and high Tg laminate failures. These failures combined with internal research have provided a unique perspective for design for manufacturability and reliability. These lessons will be presented to the class when we discuss material selection, current electronics research, and failure analysis case studies. We will touch on design considerations for many advanced assembly processes as well as discussing types of analytical techniques that can be used for materials characterization.

Topics Covered

FA Tools and Techniques to be discussed include the following:

Suggestion: Bring specific questions or examples of surface mount process difficulties you are willing to share for an open discussion at end of class. In my experience many problems can be solved with a brief discussion of the issues.

SOLDERING - Monday

Selective Soldering Processing and Manufacturability

Course Objectives
This workshop teaches the essentials of selective soldering and describes process variables serving as guidance to enhance the flexibility, reliability and quality provided by the selective soldering equipment. Selective soldering with lead-free alloys will be discussed in detail including differences in process parameters compared to tin-lead solder such as solderability aspects, wetting behavior of lead-free alloys, and higher operating temperatures. Numerous case studies based on the instructor's experience will be presented. The workshop is based on real-world consulting practice defining the proper understanding of component limitations, clearance restrictions, thermal requirements and solder joint reliability issues that will insure complete knowledge of the selective soldering process.

Topics Covered
1.) Fundamentals of Through-Hole Soldering

2.) Solderability

3.) Solder Alloys

4.) Flux Deposition and Flux Activation

5.) Thermal Profiling

6.) Through-Hole Design Guidelines

7.) Quality Measurement

8.) Troubleshooting Guideline

9.) Process Optimization

10.) Preventative Maintenance

Soldering Technology for SMT: Achieving High Yields and Reliability

Course Objectives
In this workshop, a detailed discussion of soldering materials, components, and PCBs will be given to help the attendee understand the important aspects of each to produce a complete electronics product that meets current and future legislative restrictions. Additionally, a detailed discussion of the assembly process will be covered with an examination of process optimization and defect elimination.

Topics Covered

SUBSTRATES - Thursday

FREE half day course for SMTA MEMBERS! You are required to register to receive a handout and a Certificate of Completion, but there is no charge for the course. (Non-member rate applies.)

Design for Reliability for PCBs

Course Objectives
Designing printed boards today is more difficult than ever before because of the increased lead free process temperature requirements and associated changes required in manufacturing. Not only has the density of the electronic assembly increased, but many changes are taking place throughout the entire supply chain regarding the use of hazardous materials and the requirements for recycling. Much of the change is due to the European Union (EU) Directives regarding these issues. The RoHS and REACH directives have caused many suppliers to the industry to rethink their materials and processes. Thus, everyone designing or producing electronics has been or will be affected.

Topics Covered
Introduction

Printed Circuit Boards