SMTA International  

Conference: Oct. 14 - 18, 2012  
Exhibition: Oct. 16 - 17, 2012  

Walt Disney World Dolphin  
Orlando, Florida  
 

Tutorials

Half day (3.5 hours) educational courses are led by internationally respected professionals with extensive experience in the subject area. Course instructors deliver focused, in-depth presentations on topics of current importance to the industry, based on their research and industry experience. Tutorials are application oriented and structured to combine field experience with scientific research to solve everyday problems. Tutorials are offered on Sunday, Monday, and Thursday to provide you the opportunity to attend the conference sessions and visit the exhibit floor.

Tutorial registration includes breaks, course materials, and a Certificate of Attendance.
Biographies for all instructors are available.

Sunday
  • Manufacturing and Assembly
  • Substrates
  • Quality and Reliability
  • Advanced Packaging
  • Monday
  • Manufacturing and Assembly
  • Quality and Reliability
  • Advanced Packaging
  • Soldering
  • Thursday
  • Soldering - FREE!


  • SUNDAY, October 16

    MANUFACTURING AND ASSEMBLY - Sunday

    T1       Understanding and Implementing Best Practices in Electronic Assembly Processes NEW!
    Phil Zarrow, W. James Hall, and/or Joseph Belmonte, ITM Consulting
    Sunday, October 16 | 8:30am – 12:00pm | 103A

    Course Objectives
    You have the responsibility and resources to improve the productivity of an assembly operation….what do you do? This course drives awareness and solutions to the adverse impact that nonoptimal assembly practices and processes have on the product quality and financial success of electronic assembly businesses. A comprehensive perspective on problem issues is developed for the electronic assembly process, including design, materials (both existing and emerging), equipment, procedures, and methods. Most importantly, practical solutions are presented. Key issues that consistently result in assembly problems and low yields are identified and resolved.

    Who Will Benefit
    This course is intended for Manufacturing, Process, Design, Test and Quality Engineering personnel as well as Management who are involved in the production of surface mount or mixed technology assemblies.

    Topics Covered
    • Introduction and optimization objective
      • Getting the most productivity from an existing line
      • Definition of "Best Practices"
    • The "10 Deadly Sins of SMT Assembly"
    • Best practices in the assembly process
      • Material handling
      • Solder paste printing process best practices
    • Component placement process best practices
    • Reflow soldering process best practices
    • Dispensing process best practices
    • Wave and selective soldering process best practices
    • Best practices concerning "challenging technologies"
      • QFNs
      • Ultra-miniature components (0201s, 01005s, ultra fine pitch BGAs & CSPs)
      • POP
      • Flex circuits
    • Process optimization "Best Practices"
      • Data driven process design
      • Practical use of Design of Experiments (DOE) in electronic manufacturing
      • Practical use of Statistical Process Control in electronics manufacturing
      • Inspection and test process design
      • Training program best practices
      • Manufacturing organization best practices
      • Product design for manufacturability and testability




    T2       Four Ps of SMT in a Lead-Free World: Principles, Practice, Promises and Problems
    Ray Prasad, Prasad Consultancy Group
    Sunday, October 16 | 1:30pm – 5:00pm | 103A

    Course Objectives
    There is no doubt that lead-free has impacted on almost everyone in the electronics industry, from suppliers of components, boards and materials to manufacturers and users of electronics products and equipment including the military and medical industry. The lead-free train has been moving fast, even if you work in a currently exempt industry you need to get onboard or risk losing market share to competitors particularly when the leaded products and components you are using become only available in lead-free.

    Learn how to resolve issues for an effective implementation of SMT in a lead-free world at a lower cost and higher yield. The objective of this course is to identify the technical issues in through hole, SMT, BGA, fine pitch technology and the impact of lead-free that must be resolved for an effective implementation of mixed assembly electronics products for both tin lead and lead-free.

    This is not a theoretical course it is based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients, this course deals with "real-world" problems in lead-free implementation.

    Who Will Benefit
    Anyone in process, quality, manufacturing, design, purchasing and management who wants to get a good understanding of SMT, Lead-Free, fine pitch, and BGA manufacturing issues for building assemblies in-house or at a subcontractor will benefit from this course.

    Topics Covered
  • Brief overview of SMT and lead-free
  • Key reflow defects, their desired ratios to prevent field failures.
  • Solder paste and its application
  • Soldering (wave and reflow)
  • Lead-free implementation: problems and promises o Why conversion to lead-free solders is necessary and its impact on business o Metallurgy and selection of lead-free solders o Designing in lead-free world o Impact of LF solder on board assembly, materials and processes o Manufacturing conversion strategy to Pb-free products
  • Selective soldering
  • Flux and cleaning and no clean
  • Repair



    SUBSTRATES - Sunday

    T4       Design and Implementation of Embedded Components NEW!
    Vern Solberg, Solberg Technical Consulting
    Sunday, October 16 | 8:30am – 12:00pm | 103B

    Course Objectives
    Although the printed circuit has traditionally served as the platform for mounting and interconnecting active and passive components on the outer surfaces, companies attempting to improve functionality and minimize space are now considering embedding a broad range of components within the circuit structure. Both uncased active and passive component elements are candidates for embedding but the decision to embed components within the multilayer circuit structure must be made early in the design process. This course was developed to better enable the product designer and manufacturing specialist to have a clear understanding of the principles for embedding components in an organic multilayer circuit board structure. The course will include design guidelines, material selection, and termination methodology for embedding both 'formed' and 'inserted' passive components including resistor, capacitor, inductor, and discrete transistor elements. Process variations for embedding and interconnecting thinned semiconductor elements within the multi-layer PCB will also be illustrated with examples of current applications.

    Who Will Benefit
    This course has been developed specifically for PCB Designers, Design Engineers and those responsible for electronic product development, assembly processing and manufacturing efficiency. This would include manufacturing and test engineering specialists for the OEM, ODM, and EMS providers.

    Topics Covered
    • Design Methodology
    • Total circuit consideration
      • Internal component mounting
      • External component mounting
      • Circuit interfaces
    • Layout strategy
      • Active components top; passive bottom (wave solder)
      • Active components top, active components bottom; passives top and bottom
      • Passives inside mounting structure plus external attachment
      • Actives and passives inside mounting structure plus external attachment
    • Materials
    • Base materials and build-up structures
      • Organic resins
      • Conductor characteristics (copper foil/film)
      • Component forming material
      • Adhesives (conductive/nonconductive)
      • Solder and other attachment materials
    • Core structure
      • Two sided base core (with or without vias)
      • Multilayered base core (with or without thru, blind, or buried vias)
      • Multilayer base core with resistive material
      • Core can become capacitors or inductors
    • Surface finish for inserted components
      • Conductive plating alternatives
      • Protective coating alternative (OSP)
      • Finish on parts for mounting structure compatibility
    • Fabrication Process Variations
    • Component attachment process
      • Dielectric encapsulation
      • Reinforced prepreg
      • Unreinforced resin
      • Resin coated copper (RCC)
      • Press cycle description
    • Via hole preparation and interconnectivity
      • Connection to copper conductors
      • Connection to component terminations




    QUALITY AND RELIABILITY - Sunday

    T6      Tin Whiskers - A 2011 State of the Industry Assessment NEW!
    David Hillman and Matt Hamand, Rockwell Collins
    Sunday, October 16 | 1:30pm – 5:00pm | 202C

    Course Objectives
    Tin Whiskers were investigated and "solved" in the 1950s so why are we talking about them in 2011? The objective of this tin whisker course is to provide: (1) a basic understanding of a tin whisker phenomena; (2) data and resources allowing an attendee to create a tin whisker mitigation protocol applicable for their product/use environment; (3) an update of some of the latest industry investigations and results.

    Who Will Benefit
    The course is intended for attendees who are looking for a basic understanding of tin whiskers, individuals who are creating a tin whisker mitigation protocol or someone who is looking to learn about some of the more recent tin whisker investigation activities.

    Topics Covered
  • Tin Whiskers 101
  • Tin Whisker mitigations that you don't control
  • Tin Whisker mitigations that you do control
  • Tin Whisker mitigation plan basic tenets
  • Current industry Tin Whisker investigations



    ADVANCED PACKAGING - Sunday

    T8      Packaging and Reliability Considerations for High Brightness LEDs NEW!
    Randy Schueller, Ph.D., DfR Solutions
    Sunday, October 16 | 1:30pm – 5:00pm | 103B

    Course Objectives
    With the elimination of incandescent light and the toxic limitations of compact fluorescent bulbs, there has been a dramatic increase in the interest in high-brightness-light-emitting-diodes (HB-LEDs). Potential applications for HB-LEDs include solid state residential and commercial lighting, automotive, signage and displays, and various medical applications, among many other creative uses. Many of these applications have requirements for 15-25 years of operation, making their reliability of critical importance. Durability of LEDs has recently received significant attention as Energy Star has proposed standards for solid state lighting (SSL) lifetime. The packaging architecture used for the LED has great influence on the reliability (heat removal being the primary concern). The thermal path for any LED structure begins at the solder point and includes the case temperature of the LED out to the ambient temperature, the HB-LED thermal stud in the package, the PCB (printed-circuit board), and its thermal-interface material, be it solder or adhesive. This course will address how changes in these various packaging materials and designs impact the reliability of the end product. It will also provide insight into the failure modes and mechanisms for HB-LEDs including those from electrical, thermal, and mechanical stresses. The attendee will learn how to determine the material selection tradeoffs necessary to achieve the intended reliability for his particular design and how changes impact the overall product lifetime.

    Who Will Benefit
    Those interested in learning more about LED structures, markets, packaging methodology, failure mechanisms and techniques to improve reliability.

    Topics Covered
  • The structure of LEDs and how they work
  • Markets for LEDs and respective sizes
  • The most promising applications for LEDs
  • Energy Star requirements
  • Packaging designs
  • Impact of packaging materials on reliability
  • Thermal management solutions
  • Through-silicon via applications
  • Best practices for reliability testing and design
  • Various LED failure modes



    MONDAY, October 17

    MANUFACTURING AND ASSEMBLY - Monday


    T9       Design & Assembly Guidelines for BTCs such as QFN, DFN & MLF In a Lead-Free World NEW!
    Ray Prasad, Prasad Consultancy Group
    Monday, October 17 | 8:30am – 12:00pm | 103A

    Course Objectives
    Bottom Termination surface mountComponents (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface to surface interconnections. BTCs are like BGAs which also have hidden terminations, but they are also very different. BTCs do not have spheres but rather metallized terminations or pads underneath the package. This minor difference in the physical I/O shape makes all the difference in design, assembly, and rework between BTCs and BGAs. Since there are no leads or balls in BTCs to take up any slack from package or board warpage, you essentially need perfection in design and assembly process.

    The objective of the course is to get away from the trial and error approach and provide you successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes. This is not a theoretical course; it is based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients, and deals with "real-world" problems in lead-free and tin-lead BTC implementation.

    Who Will Benefit
    The target audiences for this course are managers, design, process, and quality engineers, and operators and technicians who deal with the electronic design, assembly, inspection, and repair processes. The intent is to provide useful and practical information to those are using or considering tin/lead or lead-free processes for assembly of BTCs. Anyone in process, quality, manufacturing, design, purchasing, and management who wants to get a good understanding of design and manufacturing issues in BTCs for building assemblies in-house or at a subcontractor will benefit from this course.

    Topics Covered
    • Introduction
      • Pros and cons of BTC
      • Pull back vs. non pull back
      • BTC package manufacturing process
    • Major design considerations for BTCs
      • Laminates and surface finish considerations
      • Land pattern and stencil design guidelines
      • Component considerations
    • Assembly process guidelines for BTC
      • Solder paste printing-the key process step
      • Reflow process guidelines
      • BTC solder joint quality requirements
      • BTC rework process DFM for both tin-lead and lead-free soldering




    T10      DFM Project Setup, Measurement Definition, and Elements From Introduction to Advanced DFM Analysis NEW!
    Dale Lee, Plexus Corporation
    Monday, October 17 | 8:30am – 12:00pm | 103B

    Course Objectives
    Component packaging technology continues to decrease in size (length, width, thickness), interconnection density per unit area is increasing (thinner PCB's, smaller lines & spaces), functional performance is increasing (thermal, mechanical, electrical) at the same time as assembly processes are changing to lead-free assembly and other legislated requirements. This evolution in product designs has been addressed in the past with DFX design analysis and six sigma process control tools.

    Today's design tolerances have impacted traditional assembly processes with very tight solder application, component placement and soldering constraints. Using traditional six sigma process controls are insufficient to achieve a high yielding manufacturing process. This course will introduce the element of design for matched process (DFMP) to product design and examples of several opportunities within DFMP process for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching and environmental controls that can impact manufacturing yields.

    Who Will Benefit
    This event is ideally suited to new and experienced This event is ideally suited to new and experienced PCB/PCBA designers, manufacturing and process engineers, quality and inspection staff, production operators and any members of staff tasked with looking at yield monitoring and process improvements on printing and reflow. Managers and supervisors would also benefit from a fuller understanding of the issues currently being experienced in industry.

    Topics Covered
    • Global product design elements
      • Manufacturing environment, design documentation, cultural
    • PCB design impacts
      • PCB material selection, component/PCB warpage, SMT pad size & escape routing, via/micro-via, solder mask opening
      • Location (via in pad), PCB/component lead finish issues, high density design
    • Wave solder design impacts
      • Lead-free solder, thermal connections, pad shape, thieving pad design, lead protrusion
      • Solder mask, tooling design, copper dissolution
    • SMT solder design impacts
      • Thermal balance, trace routing, equipment limitation/tolerance, PCB/PCB array tolerance, process tooling design
    • Process control impacts
      • Paste volume, thermal shock SMT & PTH, reflow process warpage
    • Cleaning impacts
      • Compatibility issues, low stand-off components




    T12       BTC (Bottom Termination Components) Assembly – Material, Process and Reliability NEW!
    Jennie S. Hwang, Ph.D., H-Technologies Group
    Monday, October 17 | 1:30pm – 5:00pm | 202C

    Course Objectives
    Facing the relentless challenges in SMT manufacturing as a result of the continued developments in packages, this course focuses on the assembly of Bottom Termination Components (BTCs, e.g. QFN, LGA, MLF, SON, DFN). With the objective to improve the production yield and to assure product reliability, the updated, important aspects of materials, techniques, processes, and reliability for both Pb-free and SnPb products will be addressed.

    Various configurations of BTCs in periphery-leaded and solder-ball array packages will be outlined. The best practices of assembling BTCs including solder material, PCB assembly processes, and rework will be discussed. The course will also deal with the real-world production issues and discuss the BTC solder joint reliability, and what it takes to make reliable solder joints. Attendees are encouraged to bring their issues for discussion.

    Who Will Benefit
    The course provides a working knowledge to all who are involved with or interested in BTCs assembly including designers, engineers, researchers, and managers; also designed for those who desire the broad-based information.

    Topics Covered
  • BTC – driving forces, challenges
  • BTC types – QFN, LGA, MLF, SON, DFN, others
  • Performing solder paste – critical characteristics, performance
  • Solder paste – rheology
  • Solder paste printing – process parameters, stencil, stencil design
  • Reflow techniques – optimum profile, best practice
  • Production defects – prevention, remedies
  • BTC solder joint reliability – fundamentals
  • BTC solder joint reliability – case studies
  • BTC solder joint reliability – performance criteria



    Bob describes his tutorial.
    T13      Facing Today's Toughest Rework Challenges NEW!
    Bob Wettermann, BEST Inc.
    Monday, October 17 | 1:30pm – 5:00pm | 103B

    Course Objectives
    The objective of the course is to expose the student to numerous rework solutions to the various challenges faced by PCB assemblers. These challenges from a parts package perspective include:
  • BGA rework, POP rework, BTC rework, high thermal mass board rework, ultra small package rework-00201 and 000105
  • Various rework methods will be covered, including process photographs and board examples.

    Who Will Benefit
    PCB rework technicians, SMT engineers, PCB repair technicians

    Topics Covered
  • BGA
  • POP
  • BTC (QFNs, LGAs)
  • High thermal mass boards
  • High density connectors
  • 00201 and 000105



    QUALITY AND RELIABILITY - Monday

    T14      Failure Modes and Process Defects for Flip Chip and Advanced Package and Board Assemblies NEW!
    Daniel F. Baldwin, Ph.D., Engent, Inc.
    Monday, October 17 | 8:30pam – 12:00pm | 202D

    Course Objectives
    Over the past few years, numerous advanced packaging and process technologies have emerged such as flip chip in package, PoP, SiP, WLCSP, 3D-WLCSP, QFN, etc.. While a large number of technical publications are available to help with process requirements, understanding failure modes and reliability standards is essential for these technologies to be successfully implemented. This course will present reliability test procedures, assembly process defects, and common failure modes that occur in advanced package and board level assemblies. It will focus on accelerated reliability tests, process defect identification and resolution, failure mechanisms and the associated analysis tools needed to identify them, such as FTIR, XRF, transmission X-ray analysis, acoustic microscopy and scanning electron microscopy. Numerous process defects and failure modes will be presented along with extensive visual aids to provide a more intuitive understanding of the defects and failure modes associated with these advanced assemblies. It will also discuss artifacts leading to process defects and how they can contribute to premature failure.

    Who Will Benefit
    Individuals-associated with electronics packaging, package reliability, package failure analysis, and assembly process control/defects. Managers-knowledge gained through this course will allow managers to make informed decisions about the technical feasibility, implementation factors, performance benefits, reliability, and risks of implementing flip chip technology. Engineers-manufacturing, quality, design, and packaging engineers in integrated circuit, equipment, materials, and system design who are challenged to solve process defects and packaging problems. Knowledge gained through this course will allow engineers and technologists to make informed decisions about the technical feasibility, implementation factors, performance benefits, reliability, and risks of implementing flip chip technology.

    Topics Covered
  • Reliability tests
  • Destructive and non-destructive failure analysis and equipment
  • Process defects and effects on failure and reliability
  • Failure modes and reliability implications
  • Delamination and void growth
  • Solder migration
  • Solder extrusion
  • Die cracking – center
  • Die cracking – edge
  • Underfill cracking – fillets
  • Underfill cracking – bulk
  • Solder fatigue
  • Pad lift
  • Solder creep fracture
  • Gold embrittlement
  • Interconnect, substrate, and chip design factors
  • Stress analysis of assemblies



    T16      Optimizing X-ray Inspection: Equipment, Processes and Procedures
    Bob Klenke, ITM Consulting
    Monday, October 17 | 1:30pm – 5:00pm | 103A

    Course Objectives
    This course is intended to provide the experienced participant with a thorough yet practical overview of the X-ray inspection process. High manufacturing yields can best be attained by a comprehensive understanding and successfully implementing the most appropriate test and inspection regiment. This course is based on real-world consulting practice and will give the participant a true comprehension of the X-ray inspection process. X-ray inspection methodologies will be covered step by step including an overview of equipment characteristics, processes, and procedures. The final part of this course will address those techniques vital for the inspection of lead-free assemblies as well as methods to minimize X-ray dosage experienced by radiation sensitive components such as DRAM and SDRAM devices.

    Who Will Benefit
    This course is intended for circuit board designers, process engineers as well as manufacturing and quality personnel who are experienced in SMT and through-hole assembly who want to further their expertise in implementing and troubleshooting the processes, equipment, and materials involved in modern electronic assembly technology. Most importantly it will give attendees a perspective on how to implement and optimize the X-ray inspection process in the most effective manner.

    Topics Covered
    • Fundamentals of X-ray Inspection
      • Geometric magnification, system magnification and image quality
      • Oblique viewing, tilting sample versus moving detector
      • In-line laminography and off-axis 2D inspection methodologies
      • Complementary inspection strategies and bridging techniques
    • Defect Detection Techniques
      • BGA micro-cracks, interfacial voids and process voiding
      • Head-in-pillow defects and automated HIP inspection routine
      • Inspection of QFP, QFN and discrete SMT components
      • Quantifying percentage of through-hole fill
    • Specific Application Requirements
      • Automatic BGA void percentage calculation
      • Infrared microscopy, XRF and X-ray counterfeit component detection techniques
      • Imaging of microvias within BGA substrates
      • Correlation of BGA solder ball diameter and bridging effects of popcorning
    • Computerized Tomography
      • Image acquisition, computational geometric processing and three-dimensional modeling
      • 3D imaging of multi-level wire bonding and flip-chip solder bumps
      • Inspection of advanced 3D packaging and stacked die devices
      • Non-semiconductor applications including high-temperature automotive electronics
    • Optimizing the X-ray Inspection Process
      • Proper selection of tilt and rotation angles and X-ray parameters including kV and W
      • Retaining sub-micron feature recognition and high resolution images
      • Compensating X-ray tube parameters for lead-free material properties
      • Minimizing radiation dosage for commercial-off-the-shelf semiconductor devices




    T17      Universal Instruments Corporation's APL Failure Analysis: Lessons Learned in Manufacturing NEW!
    Martin Anselm, Universal Instruments Corporation
    Monday, October 17 | 1:30pm – 5:00pm | 202D

    Course Objectives
    Universal Instruments Corporation's Advanced Process Laboratory has observed countless failures in electronics manufacturing. From fine pitch printing, to PoP, 01005 defects, and high Tg laminate failures. These failures combined with internal research have provided a unique perspective for design for manufacturability and reliability. These lessons will be presented to the class when we discuss material selection, current electronics research, and failure analysis case studies. We will touch on design considerations for many advanced assembly processes, as well as discussing types of analytical techniques that can be used for materials characterization.

    Please bring specific questions or examples of surface mount process difficulties you are willing to share for an open discussion at the end of class.

    Who Will Benefit
    This is an introductory course for project managers, process engineers, quality and reliability engineers that will identify weaknesses of lead-free manufacturing and possible failure conditions.

    Topics Covered
  • What are the major difficulties in lead-free reliability testing
  • Mixed alloy assembly best practices
  • PCB plating considerations
  • Analytical testing techniques and what they can identify root causes for production failures.
  • Lead-free laminate selection and testing procedures: Can your board withstand 9x reflow?
  • Learned lessons from actual failure analysis case studies



    ADVANCED PACKAGING - Monday

    T18      BGA/CSP/LGA/WLP Reliability in Pb-free Packaging & Assembly NEW!
    Jennie S. Hwang, Ph.D., H-Technologies Group
    Monday, October 17 | 8:30am – 12:00pm | 202C

    Course Objectives
    This course focuses on solder-ball-array packages and assembly (BGA, CSP, WLP, LGA) and addresses critical questions and prevalent issues in manufacturing. Questions to be answered include: "What are challenges with LGA?", "What are BGA lead-free issues?"; "Should BGA solder balls become molten during reflow?"; "How the process affects the assembly reliability?"; "Can SAC ball and SnPb solder paste or vice versa work well?"; "Can SAC ball and other Pb-free solder paste work well?"; "Can SAC ball and SAC solder paste work for harsh environment electronics?"; What it takes to produce acceptable Pb-free BGA assemblies?"; and "What it takes to produce the reliable Pb-free BGA assembly for harsh environment electronics?" Both "backward" and "forward" compatibility will be discussed. The impact of reflow process on reliability will be discussed. BGA/CSP/WLP/LGA assemblies that are being practiced and/or recommended in the industry will be ranked in performance and reliability, particularly for harsh environment electronics. Reliability data on solder ball attachment in producing BGA packages will be summarized. The course also outlines the critical parameters to optimize the SAC performance, as well as the scientific and manufacturing rationale behind the performance. Attendees are encouraged to bring their own production and reliability issues for discussion and solution.

    Who Will Benefit
    The course provides a working knowledge to all who are involved with or interested in the assembly of solder ball-containing packages (BGA, CSP, LGA, WLP) including designers, engineers, researchers, managers and business decision makers; also designed for those who desire the broad-based information.

    Topics Covered
  • Main BGA / CSP / WLP challenges
  • Main LGA challenges
  • Examine SAC ball + SAC paste assembly – key criteria, test results, process impact
  • Examine SAC ball + SnPb paste assembly – key criteria, test results, process impact
  • Examine SnPb ball + SAC paste assembly – key criteria, test results, process impact
  • Discuss key criteria, test results, impact of process among SAC systems including SAC405, SAC305, SAC387, SAC125, SAC105, SAC125Ni, and several other alloys
  • Examine SAC ball + low-temp paste assembly – key criteria, process impact
  • Examine low-temp ball + SAC paste assembly – key criteria, process impact
  • Examine low-temp ball + low-temp paste assembly – key criteria, process impact
  • Scientific and manufacturing fundamentals behind the test results and reliability performance
  • BGA / CSP /WLP/LGA solder joint fracture mechanisms and failure modes
  • Effects of PCB surface finish
  • Black-pad failure – causes
  • Black-pad failure – how to avoid
  • Effects of solder volume in LGA performance
  • BGA rework – critical parameters for success
  • WLP solder ball attachment – factors, reliability requirements
  • BGA package solder ball attachment – reliability data of various solder ball systems
  • Comparison of prevalent BAG/CSP/WLP/LGA assemblies in performance & reliability
  • Summary discussions - effects of process, material, surface, finish, testing/service conditions on BGA/ CSP /WLP/LGA solder joint reliability and assembly integrity.




    SOLDERING - Monday

    T20       Head and Pillow (HnP) SMT Failures in Electronic Assemblies and How to Prevent Them
    Dudi Amir, Intel Corporation
    Monday, October 17 | 1:30pm – 5:00pm, | 201C

    Course Objectives
    As the industry moves toward lead-free soldering and Ball Grid Array packages with thinner and finer pitch, there is an increase in SMT non-wet types of defects known as head-and-pillow defect. This defect is hard to detect after SMT assembly and most likely will fail at the customer. This course will cover the most common failure modes causing head-and-pillow in electronic assemblies. The causes of each head-and-pillow defect mode will be explained and examples of each will be detailed. The course will also discuss ball on pad, a defect that is very similar to head-and-pillow, which has increased in recent years in electronic assembly. The course will discuss how to identify the root cause of the failure, and it will give potential solutions to prevent the defect from happening and create a robust SMT assembly process. Also discussed will be various failure analysis techniques to identify head-and–pillow non wet. Finally, a few head-and-pillow case studies will be reviewed.

    Who Will Benefit
    This course will benefit anyone involved in the design, assembly or troubleshooting of PCB assemblies or BGA packages. It will also benefit those who are responsible for system reliability or supplier quality functions. Also anyone involved with transitioning products or processes to Pb-free would greatly benefit from the material presented. Lastly people who are responsible for failure analysis will find the course very informative.

    Topics Covered
    • Head & pillow definition
    • The challenge and risk
    • Detection risk
    • Defect mechanism
    • Defect mode category
    • Process related failure modes
      • Solder volume
      • Misplacement
      • Incomplete reflow
      • Reflow profile parameters
      • Contamination
    • Material related failure modes
      • Solder paste key properties
      • Solder ball oxidation
      • Solder ball alloy
      • Dynamic warpage
      • Ball on pad
      • Co-planarity
      • Paddle insertion
      • Solder ball true position
      • Boards warpage and sag
      • Moisture induced HnP defects
    • Design related failure modes
      • Board design
      • Package standoff gap
    • HnP failure analysis
    • HnP case study




    THURSDAY, October 20

    SOLDERING - Thursday


    FREE half day course for all SMTA MEMBERS! You are required to register to receive a handout and a Certificate of Completion, but there is no charge for this practical course presented by STAR Instructor, Rob Rowland. (Non-member rate applies)

    T21      A Guide to Pb-free Reflow Soldering
    Rob Rowland, RadiSys Corporation
    Thursday, October 20 | 8:30am – 12:00pm | 104

    Course Objectives
    Surface mount soldering processes are very challenging and the transition to Pb-free soldering has added another level of complexity. This course identifies and examines the key process and material issues associated with Pb-free reflow soldering. In some cases Pb-free soldering defects are causing more severe damage or they are happening more frequently, and several new defect types have emerged. Implementing robust Pb-free reflow soldering processes and focusing on defect prevention are more important than ever because rework and repair is more difficult or, in some cases, impossible.

    Soldering profiles are simply a balance between conveyor speed and temperature settings; however achieving the right balance is tricky. Time/temperature profiles are influenced by substrates, components, fluxes and solder alloys, and they should be based on the physical and chemical parameters that influence the soldering process – they should not be developed by trial and error. A soldering profile strategy must be developed before a reflow soldering method is defined or equipment is selected.

    Case studies will address defects and reliability concerns such as PCB delamination and cracking, moisture related delamination, pad cratering and head-on-pillow. Failure analysis techniques like optical inspection, dye and pry, X-ray and cross sectioning will also be discussed. And, for future reference, applicable industry standards will be highlighted.

    Who Will Benefit
    This course is intended for individuals who are transitioning to or already doing Pb-free reflow soldering. The information presented in this course will be beneficial to anyone involved with Pb-free soldering including engineers, operators, and managers. Some basic knowledge of surface mount technology is helpful but not essential.

    Topics Covered
  • Steps to creating reflow soldering profiles
  • Component peak temperature
  • Component ramp up and ramp down rates
  • Component surface finish
  • Tin whisker theory and risk
  • Moisture sensitive components and PCBs
  • PCB glass transition temperature
  • PCB coefficient of thermal expansion
  • PCB material decomposition temperature
  • PCB time to delamination
  • PCB surface finish
  • Flux activation temperature and time
  • SnPb and Pb-free solder alloy options
  • Pb-free solder joint appearance
  • Mixed alloy (Sn/Pb and Pb-free) soldering
  • Pb-Free BGAs and SnPb Solder
  • Reflow soldering phases
  • Reflow soldering profiles
  • Conveyor speed calculation
  • Recommended reflow oven zone settings
  • Pb-free substrate (PCB) reliability
  • Pb-free solder joint reliability
  • Voiding and head in pillow defects
  • Pad cratering and CAF defects
  • Related industry standards



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