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| Full-day
(7 hour) and half-day (3.5 hour) educational courses are led by industry
professionals with extensive experience in the subject area of the course.
Course leaders deliver focused, in-depth presentations on topics of
current importance to the industry, based on their research and industry
experience. |
Tutorials
are application-oriented and structured to combine field experience with
scientific research to solve everyday problems. Tutorials are offered on
Sunday, Monday, and Thursday providing you with the opportunity to attend
the conference sessions and visit the exhibit floor.
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SUNDAY, AUGUST 17
 Manufacturing and Assembly -
Sunday
T1 Surface Mount Technology in a Lead Free World: Principles and
Practice
Ray Prasad, Ray Prasad Consultancy Group (Instructor Bio)
Sunday, August 17
8:00am –
5:00pm
What You Will Learn
Most companies generally realize the benefits of electronics manufacturing by trial and error at considerable expense and frustration. The objective of this course is to identify the technical issues in through hole, SMT, BGA, fine pitch technology and the impact of lead-free that must be resolved for an effective implementation of mixed assembly electronics products for both tin lead and lead-free. The course material is based on Mr. Prasad's textbook Surface Mount Technology: Principles and Practice, 2nd Edition.
This is not a theoretical course. Based on Mr. Prasad's over two decades of experience at Boeing, Intel, and with numerous clients, this course deals with "real-world" problems in SMT and lead-free implementation.
Who Should Attend
Anyone in process, quality, manufacturing, design, purchasing and management who wants to get a good understanding of SMT, lead-free, fine pitch, and BGA manufacturing issues for building assemblies in-house or at a subcontractor will benefit from this course.
Topics Covered
SMT process steps and components
Impact of lead-free on choices for components, laminates and surface finishes
Effect on MSL level and reflow profile due to lead-free
Solder paste and its application
Soldering (wave and reflow)
Lead-free soldering
Backward and forward compatibility
Selective soldering
Flux and cleaning
No clean
Fine pitch
Quality control, inspection and repair
 T2 Lean and Green SMT - Lean Lead-Free SMT Manufacturing
Phil Zarrow and Jim Hall, ITM Consulting (Instructor Bios)
Sunday, August 17
8:00am –
5:00pm
What You Will Learn
Environmental and economic demands have made electronic manufacturing more challenging than ever. To be competitive In this day and age, the electronics assembler has to be both Lean and Green. A daunting task perhaps, but it can be accomplished. Although many electronics manufacturers are still in transition to the production of RoHS compliant, Lead-Free products, sufficient experience has been gained throughout the industry to move the "science" of Lead-Free design and manufacturing from the investigation phase into at least the first levels of optimization. This must be accomplished in a manner that facilitates the manufacturer’s competitiveness. This course teaches the essentials of lean manufacturing as they apply to SMT electronic assembly. Rather than generalizations, specific applications of lean principles are presented and discussed. The course also presents an objective examination of the current state of the industry in applying and optimizing lead-free materials, solder, equipment, and processes. The course examines what the variations in lead-free alloys mean to the electronic assembler at the process and logistics level and choosing specific alloys to enhance reliability for individual applications. The pros and cons of specific available solder alloys are discussed, and how these can be utilized to minimize costs, assembly problems (such as copper erosion), and to enhance the reliability characteristics of certain types of products including handheld devices. The impact upon printing, placement, reflow, and inspection will be examined and the situations confronted by both OEMs and CEMs will also be discussed. The final part of the course will contend with the implications of lead-free on the SMT assembly process with the most current research and data. This course will demonstrate some of the opportunities to use this conversion to create a more efficient and "Lean" production environment with higher yields and less defects.
Who Should Attend
This course is intended for manufacturing, process, quality engineering personnel, and management who want to become familiar with and to take advantage of the benefits of the lead-free SMT assembly. This course will benefit intermediate and advanced SMT users. Most important, it will give your personnel a perspective on how to implement and optimize the lead-free assembly process in the most effective manner.
Topics Covered
Logistics for Lean Lead-Free Manufacturing
BoM scrubbing, labeling, and 5-S
Inventory/storage/traceability
Lean Lead-Free Assembly Considerations
MSDs
Equipment and processes
Implementation of SPC based in-process inspection
LF alloy behavior analysis
Alloy variations for specific product enhancement
Use of nitrogen
Motorola cell phone development
Compliance
Lean Lead-Free Process Considerations
Forward and backward compatibility
Voids update
Whiskers
Copper dissolution
Reliability testing
Implementation program
T3 Lead-Free Design for Manufacture Assembly
Bob Willis, ASKbobwillis.com (Instructor Bio)
Sunday, August 17
8:00am
–11:30am
What You Will Learn
This course will provide a better understanding of the effect lead-free will have on printed board design, specification and procurement. Component specification and testing requirements to meet WEEE and RoHS will be discussed along with the simple guidance on ranking circuit board solder finishes. Layout changes that benefit a lead-free process will be highlighted as well as the subtle changes to improve yields on existing designs. Design modifications that have been used to reduce or eliminate fillet lifting, pad lifting will be illustrated and their apparent success or failure.
Bob is happy to take delegate questions in advance of the course that will be answered in the session. Email bob@leadfreesoldering.com.
Topics Covered
Component specification, selection and WEEE & RoHS compatibility
Laminate changes, options and industry trends
Through hole pad sizes and fillet lifting
PCB Supports – eliminating warp and sag
Via hole plating and reliability with lead-free processes
Copper thickness and lead-free copper erosion
Solder finish selection, storage life and process compatibility
Eliminating wave soldering with intrusive reflow
CAF and reliability in lead-free
Solder mask specification
Optimizing hole fill with lead-free intrusive reflow
Multilayer thermal break design
Through hole solder thieve designs
Modifying breakouts for lead-free
Optimizing SMT placement for lead-free
Modification of paste stencil apertures
T4 Lead-Free Selective Soldering – The Future is Now
Bob Klenke, ITM Consulting (Instructor Bio)
Sunday, August 17
8:00am –
11:30am
What You Will Learn
A critical issue for board level assemblers is forming through-hole interconnections on circuit boards of ever increasing densities. This course provides an overview of site-specific selective soldering and describes the most common methods available, including aperture pallets, fountain soldering, solder robots, laser soldering, focused light, molten wave and multi-wave. Selective soldering with lead-free alloys will be discussed in detail, including differences in process parameters compared to tin-lead solder. The course provides actual case histories and examples where selective soldering has been implemented and the corresponding benefits. It also describes the proper understanding of component limitations, clearance restrictions, thermal requirements and solder joint reliability issues that will insure complete knowledge of the selective soldering process.
Who Should Attend
This course is beneficial to personnel who will put selective soldering methods into practice. It is aimed at circuit board designers, process engineers and operational personnel who are required to bring about the necessary changes to maintain competitive assembly processes.
Topics Covered
SMT process steps and components
Impact of lead-free on choices for components, laminates and surface finishes
What selective soldering is and is not
Technology drivers
Benefits of selective soldering
Selective soldering methods
Advantages and disadvantages of various methods
Design guidelines for selective soldering
Selecting the right system for an application
Case histories and examples
Future trends
Increased role of selective soldering in lead-free soldering
T5 Lead-Free Rework: Its Implementation and Lessons Learned
Doug Peck, AEIC Inc. (Instructor Bio)
Sunday, August 17
1:30pm –
5:00pm
What You Will Learn
July 1, 2006 witnessed initial implementation of the European Union RoHS directive. As of that date, the majority of electronic products shipped into the EU had to be lead-free. Similar requirements are posed by the China RoHS directive which also restricts the use of hazardous materials in products shipped into China. Rework of these products required adoption of both lead-free materials and processes. How have electronic assemblers responded in both their product design and in their rework/repair operations to satisfy these requirements?
This course addresses the advantages/disadvantages of lead-free alternatives for PCB and component termination finishes. It discusses the need for new visual inspection criteria in absence of the smooth, shiny finishes and low wetting angles to which we are accustomed. It describes the degraded wetting properties of lead-frees, the extended soldering cycles of lead-frees, and potential damage caused by these. It also focuses on the advantages/disadvantages of candidate lead-free alloys for component leads, terminations and board finishes, their impact on rework, and new profiling requirements.
Who Should Attend
Managers, designers, manufacturing, process, quality and operations personnel involved in the decision-making, implementation, and application of lead-free technology will benefit from this course. Some familiarity with SMT is required.
Topics Covered
Lead-free alloys and their properties
Component and lead surface finishes
PCB land and pad finishes
Managing the changeover to lead-free
Hand soldering of through-hole and SMT lead-free components
Rework of lead-free assemblies
Flux effectiveness with lead-free solders
Thermal profiling requirements
Moisture sensitive devices (MSDs) in lead-free soldering
Lead-free visual inspection guidelines
X-ray of lead-free interconnects
Assembler experiences in adapting to lead-free rework/repair
Advanced Packaging -
Sunday
T6 Advanced Packaging Technologies and Future Interconnection Trends
Joseph Fjelstad, Verdant Electronics (Instructor
Bio)
Sunday, August 17
1:30pm – 5:00pm
What You Will Learn
This course will introduce SMT users to the terminology, classifications, constructions and
assembly process for advanced component packages. Packages discussed in this
course include BGAs, CSPs, Flip Chip, Wafer Level CSPs, COB, TAB and MCMs. A
thorough comparison of the advantages and disadvantages of each component type,
as well as their implementation requirements, will also be presented.
High-density interconnection, thermal management requirements and micro-via
technology will also be discussed. The course will also cover assembly process
details when using these devices in lead based and lead-free assembly.
Who Should Attend
This course
is intended for those who have a prior background in SMT. Process, design, test
and quality engineers, as well as managers and marketing, sales, and purchasing
staff will all benefit from this course.
Topics Covered
Roles of IC packaging
Construction and manufacturing processes for common IC packages
Impact of IC package design on the assembly processes
Testing strategies
Trends in the integration of IC, package and PCB substrate (e.g., the Occam Process)
What’s new, and where IC packaging technology is headed
Role of IC packaging technologies in electronics assembly
Chip scale packaging types
3-D packaging concepts
Reliability testing and electrical performance of CSPs
Impact of lead-free check points and alternative approaches
Standards for substrates
The future of IC packaging
Soldering -
Sunday
T7 Selecting a Lead-Free Solution for High Reliability Application (Industrial, Telecom, Automotive, Military, and Avionics)
Craig Hillman, Ph.D., DfR Solutions
(Instructor
Bio)
Sunday, August 17
8:00am – 5:00pm
What You Will Learn
2008 marks a critical year in the transition to Pb-free. The majority of industrial control and monitoring OEMs are releasing Pb-free product, the race is on within the automotive world to have the first “green” car, and even elements of the medical, military, and aerospace electronics community are qualifying Pb-free product. Companies ignoring this issue risk a reduction in the quality and reliability of current and future product and the eventual demise of their organization.
This tutorial will provide a unique perspective for the engineering or management attendee. Critical data and information on the quality and long-term reliability of lead-free electronics will be provided, with a particular focus on the most recent developments over the past six to twelve months. Examples of these recent findings will include why SAC may never be sufficiently reliable for military/avionic applications, and how the military/avionics world is missing the boat on mitigating the risk of tin whiskers. Within each challenge presented by lead-free, clear and concise approaches will be provided that minimize the risk to high-rel applications. Examples of these approaches will include modifying supplier specification documents, predicting reliability based upon the latest lead-free degradation models, and instituting short-term screening and auditing procedures. These approaches will be compared and contrasted to the existing GEIA documents that are expected to be the backbone of lead-free product qualification for military and avionic applications.
Who Should Attend
Engineers with a responsibility in one of the following areas: quality, reliability, components, manufacturing, product qualification, program managers in the avionics and military industry. Directors who want to know what their engineers and managers are worrying about. NOTE: This course would be an ideal lead-in to the Harsh Environments Conference on Monday.
Topics Covered
Phase I: Dealing with Pb-Free Now – The Challenge of Pb-Free Components
- Tin Whiskers
- What we know and don’t know
- Mitigation
- GEIA documents reviewed
- Mixed assembly (Pb-Free BGAs and SnPb Solder Paste)
- What drives success?
- Reliability
- What are companies doing now?
Phase II: Dealing with Pb-Free in the Future – How to Successfully Transition to Pb-free
- Scrubbing the Bill of Materials
- Selecting the printed circuit board
- Preparing for assembly
- Solder selection
- Cap cracking, popcorning, etc.
- Inspection and rework
- Validating Reliability
- High and low temperature issues
- Temperature cycling
- Vibration, shock and corrosion
- Reflow oven zone settings
- Pb-free solder joint reliability
- Related industry standards
T8 Lead-Free Solder Joint Reliability: Getting up the Learning Curve and Making Sense of the Data
Jean-Paul Clech, Ph.D., EPSI, Inc. (Instructor
Bio)
Sunday, August 17
8:00am – 5:00pm
What You Will Learn
This tutorial gives a broad and updated view of attachment reliability issues and trends for popular lead-free alloys, such as Sn-Ag-Cu (SAC). The tutorial is technical in nature and pulls together a wide range of data, material properties, test and modeling results from across the industry. Fundamental differences between SnPb and lead-free solders are highlighted as well as recent progress in the practical understanding of lead-free solder joint reliability. Upon completion of the tutorial, attendees will gather that an apparent mess of seemingly confusing test results can indeed be turned into useful reliability information.
The performance of lead-free and mixed assemblies is put in perspective with that of SnPb assemblies, and risk areas are identified. Accelerated test results are presented for common components of lead-free assemblies, including the effect of board and component finish on lead-free reliability. The surveyed data indicates a strong dependence of lead-free reliability on component type, CTE mismatch and test conditions. Material properties and fatigue curves explain differences in the reliability of SnPb and lead-free assemblies. Strain-energy based life prediction models and acceleration factors are presented, comparing test efficiency for SAC and SnPb assemblies, and illustrating how to extrapolate lead-free test results to product use conditions.
Who Should Attend
Design, materials, manufacturing, quality, or reliability professionals and managers who are responsible for or plan to implement lead-free assembly technologies in their companies’ products.
Topics Covered
Thermal cycling reliability data for common components (SMT, flip-chip, BGA, CSP)
Impact of components and test conditions on the reliability of lead-free versus SnPb assemblies
Effect of component and board finish on lead-free life
Effect of Pb-contamination on solder joint reliability
Backward and forward compatibility issues
Material properties and creep deformations, including the importance of primary and tertiary creep
Fatigue curves, failure modes, ductile-to-brittle transition temperature
Effect of dwell times on lead-free thermal cycling results: agreement between test and model predictions
Examples of lead-free solder constitutive models & life prediction models; acceleration factor comparisons
Substrates - Sunday
T9 Flex Circuit Fundamentals
Ken Gilleo, Ph.D., ET-Trends LLC (Instructor
Bio)
Sunday, August 17
8:00am – 11:30am
What You Will Learn
Flexible circuitry, the very first printed circuit, continues fast-paced advances as products shrink and features grow. Flex is a vital enabling technology for a wide range of electronics, especially portable consumer products. Flex is the very best high-density interconnect (HDI) that also provides extreme thinness, the lowest weight, pliability and extraordinary durability, even in the harshest environments like outer space. Flex is a unique 3D circuit that brings hi-reliability connections to moving assemblies. Cell phones, cameras, displays, personal-players, PDAs, iPods, iPhone, laptops, disk drives, and hundreds of large and small products use flex. But mature applications, like automotive and military, are also growing, as more powerful electronics are adopted.
We’ll cover the unique flex materials - the real key to excellent performance; both high-end high-temp polymers and low-cost thermoplastics. Flex material topics include traditional polyimides, liquid crystal polymers (LCP), and ultra-low cost polyesters. We’ll compare these products and provide “when to use what” guidelines. Both traditional and newer processes are covered, including laser machining and fluid jetting (ink jet). Conductor processes include subtractive, additive, and printed PTF inks. We’ll briefly touch on RFID tags and the newest and just-emerging area, “Printed Electronics”, aka flexible electronics.
Discussions will include special properties and unique characteristics of flex dielectrics, metal conductors, polymer inks. We’ll compare flex to rigid PCBs and point out where each is best suited. You already use flex, so join us to learn more about this powerful and enabling technology.
Who Should Attend
Technical and marketing managers, designers, material suppliers, circuit fabricators, test engineers, and assembly personnel in the general printed circuit field. IC fabricators, electronic package designers, and technologists will also benefit.
Topics Covered
The fundamentals of flexible circuitry
Advantages and limitations
Flex materials: base films, conductors, finishes, masks, coverlayers, and backers
Adhesiveless vs. laminates
Think in 3-dimensional
Dynamic vs. flex to install
Assembly: SMT, COB, TAB and Flip Chip
The total cost picture
Newer areas; RFID tags and printed (organic/plastic) electronics
T10 Flex Circuit Apps - Outer Space to Inner Space and Everything Else
Ken Gilleo, Ph.D., ET-Trends LLC (Instructor
Bio)
Sunday, August 17
1:30pm – 5:00pm
What You Will Learn
Flexible circuitry remains the most versatile, valuable and unusual interconnection system in electronics today. FLEX - the “hidden” enabler - makes tens of thousands of products possible. Flex marries motion and electronics in disk drives, laptops, cameras, printers, PDAs, SmartPhones, new bendable displays, and a myriad of other products that combine motion with electronics, or need extreme miniaturization. But flex is also used for low cost and thinness, valuable for keyboards, displays, and RFID tags. You’re surrounded with products enabled by flex inside.
Flex attributes of high density - remarkable durability, designed flexibility, extreme thinness, and exceptional thermal resistance - make it ideal for circuits as well as packaging that will be covered thoroughly. Flex-Based Packages offer efficient miniaturization, lightness and durability, while providing 3D configurability for stacked multi-chip modules. Flex packages include CSPs, WLCSPs, Chip-on-Flex, TAB, Tape Carrier Packages, microBGAs, TapeBGAs, FlexBGAs and folded arrays. Find out why flex, the original chip carrier, has the highest performance.
But flex is a paradox! Products range from expensive complex military to the world’s lowest cost PCBs using polymers instead of copper. We’ll compare traditional copper-flex to efficient Polymer Thick Film (PTF) now used to make value-maximized keyboards, calculators, medical sensors, and RFID tags. Solderless assemblies are included.
We’ll examine dozens of fascinating flex examples (and samples) - from inner (implantable) to outer (aerospace) - the biggest (ECHO), longest (Space Station, new flex in 2007), farthest (Mars Rover), and emerging flexible electronics.
Who Should Attend
Technical and marketing managers, designers, circuit fabricators, test engineers and assembly personnel in the general printed circuit field should attend. IC fabricators, equipment suppliers, electronic package designers, material scientists, and most technologists will benefit.
Topics Covered
Overview of flex materials & processes
Dynamic flex for “motion electronics”
Flex in portable products
Flex packages; TAB, Flex-BGAs, Flip Chip-on-Flex, CSPs and 3D Multi-chip
High performance Flex; TBGAs, FlexBGAs, TAB, integrated TAB
Polymer Thick Film (PTF) applications
RFID tag choices; metal vs. PTF
"Flexible Electronics"; printed transistors
MONDAY, AUGUST 18
Manufacturing and Assembly - Monday
T11 (Land Grid Array), QFN (Quad Flat No-lead) Design, Assembly, Inspection & Rework
Bob Willis, ASKbobwillis.com (Instructor
Bio)
Monday, August 18
8:00am – 11:30am
What You Will Learn
LGA and QFN parts have fast become a common package type often used in many professional portable products. With any new device type there is always a learning curve for design, process and quality engineers who have to get to grips with the challenges that these packages bring. Each step of the implementation process for LGA/QFN devices will be reviewed, along with results of practice process results with these devices on rigid and flexible substrates. The instructor is well known for his practical workshops and supported by Bob Willis unique process video experiments. LGA/QFN are guaranteed to come alive.
Each delegate will also receive a FREE set of colour LGA/QFN Inspection & Rework Wall Charts to use on their manufacturing shop floor. During each workshop there are opportunities to win some of Bobs interactive CD ROMs for best questions of the session.
Bob is happy to take delegate questions in advance of the course that will be answered in the session. Email bob@leadfreesoldering.com
Who Should Attend
This workshop is designed for design, process and quality engineers responsible for introducing products containing LGA/QFN. Much of the material presented is extremely visual and practical making it ideal for manufacturing staff. Like all the instructors tutorials, it not just theory, it’s a "How to Do It Session".
Topics Covered
Component package types and construction
MSD handling levels
Solderability testing packages
Printed board layout on rigid and flexible circuits
Solder mask layout options
Lead-free stencil printing options
Placement and component packaging
Convection and vapor phase soldering yields
Visual inspection criteria
X-ray inspection criteria
LGA/QFN rework and replacement
Array solder joint reliability
Common process problems with LGA/QFN
T12 Reflow Soldering Lead-Free Alloys – Successfully
Bob Willis, ASKbobwillis.com (Instructor
Bio)
Monday, August 18
1:30pm – 5:00pm
What You Will Learn
Reflow soldering with convection or vapor phase is far less demanding to convert to lead-free than wave soldering. However there are new issues of material compatibility, higher temperatures, lead contamination, and the benefits of using pin in hole/intrusive reflow to consider. During this course each of the key stages of the reflow process will be considered, and delegates will see the results of many trials showing what works and does not in the real world of manufacture. With over six years experience with lead-free materials, processes and circuit board assembly, most of the issues have now been overcome.
The course features many typical lead-free defects and possible causes. With Bob Willis’s unique micro video clips delegates will easily understanding the issues they may face. Each delegate will also receive a FREE set of color Lead-Free Inspection Wall Charts to use on their manufacturing shop floor. During each workshop there are opportunities to win some of Bobs interactive CD ROMs for best questions of the session.
Bob is happy to take delegate questions in advance of the course that will be answered in the session. Email bob@leadfreesoldering.com
Who Should Attend
Process engineers tasked with process introduction, quality staff, and supervisors wanting to understand the process issues with lead-free reflow. Design engineers will benefit from a better understanding of the process they are designing circuit boards to pass through. The course may also benefit material and equipment suppliers who want to better understand all the issues and interactions with new alloys and modern printed circuit design.
Topics Covered
PCB and component requirements
Reliability of tin/lead plating with lead-free alloys
Concerns with MSD devices
Printed board finish requirements
Selecting laminate and solder finish
Soldering flexible and rigid boards
Solder paste options
Question and answer session on design and production process issues will be included after the course. Participants can submit questions prior to the course to guarantee a detailed answer. Email questions to bob@leadfreesoldering.com.
T13 The 10 "Deadly Sins" of SMT and Lead-Free Assembly
Phil Zarrow, ITM Consulting(Instructor
Bio)
Monday, August 18
1:30pm – 5:00pm
What You Will Learn
There are more than seven "deadly sins" when it comes to SMT¬ and they can wreak havoc on your assembly process. Common process problems can have a 5% to a 20% impact on assembly yields. In addition to this direct cost, time spent reworking and repairing, corrective action by quality control, engineering and management, and "do-overs" add to the financial impact. This course identifies the "deadly sins" of SMT assembly, for both lead-free and "leaded" processes. Besides the symptoms and consequences of each type of error, root-cause, rectification and prevention techniques will be presented.
Who Should Attend
This course is intended for manufacturing, process, design, test and quality engineering personnel, as well as management who are involved in the production of surface mount or mixed technology assemblies.
Topics Covered
How to avoid or at least quickly identify and correct the most common SMT assembly problems
General process "sins"-feedback data, design, in-process inspection and AOI
Solder paste selection
Moisture sensitive devices
Procedures and documentation
Equipment issues-set-up, operation and maintenance
Process issues, from printing through soldering
Inefficiency issues in the assembly process
Lead-free specific process "sins"
Uncontrolled mixed assembly
Hardware and tooling issues in lead-free
Complex conversion issues
Identification of vendor and source problems
Advanced Packaging -
Monday
T14 3D Packaging Applications, Requirements, Infrastructure and Technologies
Lee Smith, Amkor Technology(Instructor
Bio)
Monday, August 18
8:00am – 11:30am
What You Will Learn
This course will help you decide when and how 3D package integration can provide system or component benefits: how to evaluate and select the optimum 3D package technology based on the complex mix of cost, performance and business/logistic requirements; where industry standards, device floor-planning and supply chain infrastructures can reduce the total cost or time to market when implementing a 3Dsolution; how 3D platform technologies and industry roadmaps can be projected or shaped for next generation device integration to system design requirements. A summary of the surface mount process parameters for PoP stacking both single pass reflow and pre-stacking. A method will be introduced for rating and ranking the adoption risks for new package technologies or supply chains. This method can be used as a tool for new technology adoption, component procurement or product development requirements.
Who Should Attend
Managers, engineers and marketing personnel involved in technology selection and implementation for miniaturized electronic applications of all types. Design, manufacturing, and quality personnel involved in 3D package implementation.
Topics Covered
MCP - multichip package, components using a combination of stacked, wire bonded memory die, also referred to as stacked die package or stacked CSP.
SiP - system in a package, uses a combination of stacked logic and memory die with wirebonding or a mix of FC and wirebond interconnects.
PoP - package on package, uses stacked packages where logic and memory components are produced separately and stacked in the OEM’s surface mount assembly flow.
Embedded chip technologies where active or passive chips are embedded in printed wiring or thin film build up circuits with interconnect patterns on both sides.
Wafer level 3D packaging including die on wafer, wafer on wafer and TSV approaches.
TSV - thru silicon vias, where memory die are designed for thru Si via connection to enable multiple die to be stacked in a flip chip style assembly flow to increase memory capacity in the smallest / thinnest package profile.
A section of the course will review real world high volume 3D package technologies used in multimedia mobile handsets, and quantify the technical and business/logistic requirements and trends that make up the total cost of ownership equation. The course will explore the critical role industry infrastructure and standards play in new 3D package platforms by summarizing the package on package collaboration efforts and results.
T15 Next Generation Technologies in Electronic Packaging and Production
Craig Hillman, Ph.D., DfR Solutions (Instructor
Bio)
Monday, August 18
1:30pm – 5:00pm
What You Will Learn
Product and manufacturing engineers are often required to select, review, and/or validate new technologies that are selected by the internal design team or a supplier. Product managers and technologists are expected to be aware of evolutions and revolutions in the various components that comprise an electronic product or system. However, obtaining the information necessary to perform both tasks is difficult with the given system of information dissemination that is currently present within the electronics marketplace.
Academic publications, trade journals, and industry conferences are often segmented in a manner not consistent with actual product architecture or the multi-functional teams created within corporate organizations. The need for either rapid news easily digestible or highly rigorous, scientific studies can create a confusing array of pure marketing mush, or comprehensive and detailed data on technologies that will never be incorporated into actual product.
The purpose of this course is to clearly identify new technologies within the component packaging, printed board, circuit assembly, and thermal solution regime; provide insight into the benefits of such technologies; and concisely discuss some of the challenges and risks of implementing these technologies. To maintain close alignment with the leading adopters in the electronics industry, the list of technologies provided in this abstract may change before this presentation is finalized.
Who Should Attend
Managers and engineers in design, product, and reliability, and executives responsible for insertion of new technologies.
Topics Covered
- Component Packaging
- Printed Board
- Nanofinish
- 8 mil drill
- Filled vias
- Embedded resistors and capacitors
- Assembly
- Occam
- 2nd generation Pb-free alloys (SnCu-Ni, low Ag SAC, etc.)
- 01005 components
- Nanosolder
- Thermal Solutions
- Graphite
- B-Temp
- Stablcor
- Reactive Nanofoil
T16 Construction, PCB Design and Assembly of BGA and Leadless Packages for Pb-Free
Andrew Mawer, Freescale Semiconductor (Instructor
Bio)
Monday, August 18
1:30pm – 5:00pm
What You Will Learn
Since the introduction and rapid adoption of ball grid array (BGA) technology in the early 1990's, new package styles are constantly being introduced that further satisfy the need for miniaturization, increased integration, or higher levels of thermal dissipation, reliability and/or electrical performance. Some evolutionary changes that have been made to the original plastic BGA include the addition of integrated heat spreaders, thermally enhanced substrates, the use of flex substrates that are rigidized by the overmolding process, or by laminating to a heat spreader. Other high performance area array package solutions that can also accomplish a smaller form factor are various forms of fine pitch (FP) BGA, flip chip (FC) BGA based on laminate or different types of ceramic substrates, and wafer-level chip scale packaging (WL-CSP). Leadless or land grid array (LGA) packaging, which has seen a resurgence in the form of QFN (Quad Flat Pack No Leads), and other forms of LGAs including laminate substrate-based modules will be described. LGA is commonly used for Radio Frequency (RF), high power or height restricted applications in portable and other cost sensitive products such as automotive. Other integration solutions involve stacking packages as with package on package (PoP), folding flex-based CSPs into a stack, and package in package (PiP) or multi-chip packaging (MCP).
Key construction features of these new package families will be covered along with recommended PCB land patterns, stencil designs and SMT assembly parameters. The course will start with a general discussion of Pb-free regulations and solder alloy types. Various board-level reliability test methods, such as thermal cycling, bend and drop / shock that are used to assess the integrity of the package to PCB connection for various applications, will also be covered in detail, as will the basics of packaging thermal metrics.
Who Should Attend
Anyone involved in the specification, procurement, design, assembly, or quality/reliability of PCB assemblies containing BGA, leadless and other advanced packages would benefit from this course. Additionally, those who develop advanced packaging technologies who want to gain an understanding of PCB assembly, Pb-free soldering, and package to PCB interconnect reliability in general, would also benefit from this course.
Topics Covered
- Pb-Free regulations and solders
- Board-Level reliability testing
- Monotonic bend
- Drop/shock
- Thermal cycling
- Pb-free leaded packages
- Molded Wire-Bonded PBGAs/MAP BGA
- Thermally enhanced PBGAs
- Package thermal performance
- Tape-based BGAs
- Flip chip BGAs and bumps
- Leadless packages
- Leadframe-based (QFN, PowerQFN)
- Substrate-based (LGA)
- PCB/stencil design for leadless
- Solder joint voiding
- Stacked die in package
- Stacked packages/Package on Package
- Wafer level chip scale packaging/RCP
T17 Advanced Flip Chip Technology and Processing
Dan Baldwin,Ph.D.,Engent,Inc.
(Instructor
Bio)
Monday, August 18
1:30pm – 5:00pm
What You Will Learn
Flip chip assembly technology is gaining increased acceptance in the electronics industry. Annual growth rates projected through the next decade are 40% or higher. While flip chip technology was developed over thirty years ago by IBM and has been in production on ceramic substrates, it has yet to achieve cost competitiveness with high volume semiconductor packaging and low cost surface mount technology. In order to achieve cost competitiveness, new and innovative material systems and process technologies are required.
This course will present advanced flip chip process technology focusing on first pass yield, throughput, and cost. The course includes extensive handouts covering advanced flip chip process technology and materials. Flip chip processing of solder interconnect systems, conductive adhesive interconnect systems, thermosonic interconnects, and thermocompression interconnects will be presented. In addition, key processing elements such as underfill processing, reliability, and failure analysis will be presented. The relationship between process induced defects and flip chip reliability will be discussed. A comprehensive process characterization, reliability analysis, and failure mode analysis will be presented.
Who Should Attend
Individuals associated with advanced surface mount assembly, bare die module assembly, and advanced electronics packaging are encouraged to attend, specifically, the following: managers, manufacturing, quality, design, and packaging engineers who are challenged to solve tomorrow’s process solutions and next generation packaging problems.
Topics Covered
- Flip chip technology
- Flip chip process fundamentals
- Advanced flip chip process technologies
- Flip chip processing with no flow underfill
- 3D wafer level flip chip processing
- Flip chip processing based on fast flow snap cure underfills
- Fluxless flip chip process technology
- Lead-free solder flip chip processing
- Flip chip processing with reworkable underfills
- Conductive adhesive interconnect systems and processing
- Flip chip process implementation
- Reliability analysis and failure modes
Soldering -
Monday
T18 Pb-Free Soldering Processes—Survival, Quality, Reliability
Werner Engelmaier, Engelmaier Associates, L.C.
(Instructor
Bio)
Monday, August 18
8:00am – 5:00pm
What You Will Learn
The switch to lead-free (LF) solders raises a number of issues and problems regarding the manufacture, processing, and reliability of electronic products using LF solders. The threat to the reliability of electronic products comes from three sources: (1) solder joint reliability, (2) PCB survival during soldering and long-term reliability, and (3) component survival of soldering processes.
Except for increased processing issues, LF solder joint creep-fatigue reliability has been shown not to be dramatically different from the reliability of SnPb solder joints, at least for accelerated testing. Predicting solder joint reliability for product is still not fully established; however, Design-for-Reliability measures to be taken will be discussed. The SAC solder properties cause processing issues, such as high metal dissolution rates, higher stresses due to thermal expansion mismatches, higher soldering temperatures, will be examined together with their possible impact on solder joint quality as well as assembly damage.
Given the high temperatures required for most of the lead-free soldering processes, the survival of the printed circuit boards (PCBs) and components during the assembly process need to be assured by design, material choice, and processing steps. The PCB and component resin systems need to be able to survive the soldering processes without thermal degradation and delamination. These issues will be discussed in detail.
Who Should Attend
The course is recommended for anybody concerned with the quality and reliability of electronic products, in light of the significantly higher soldering temperatures required for the solders meeting the RoHS mandate. The tutorial is especially important for managers and engineers involved with the design, manufacture, and assembly of printed circuit boards (PCBs). It is of special significance for high-reliability applications, as well as those involved in the production of high-density electronic assemblies, and applications requiring reliable operation in severe use environments and/or for long product lives.
Topics Covered
The properties of the lead-free solders threatening the survival, quality and reliability of electronic assemblies
Load drivers and the resulting failure modes for solder attachments, PCBs and components
Design-for-reliability (DfR) for solder attachments
Design-for-reliability (DfR) for PCB interconnect structures
Material choices, specifications and processes to assure PCBs surviving lead-free soldering processes
Failure statistical distributions and their impact on Design-for-reliability
Appropriate testing to assess the extent of reliability threats
Reliability of the solder attachments, printed circuit boards (PCBs) and components in electronic products subjected to lead-free soldering
T19 What You Want to Know About Lead-free Electronics
Jennie S. Hwang, Ph.D., D.Sc.,
H-Technologies Group
(Instructor
Bio)
Monday, August 18
8:00am – 11:30am
What You Will Learn
Lead-free electronics manufacturing has become a reality. Based on the sustained 18-year research, testing data and manifold evaluations, the manufacturing know-how to achieve the yield, quality and reliability will be summarized. Some exemplary real-world production results will be illustrated. This tutorial encourages the attendees' prepared and/or impromptu questions in any aspect of lead-free electronics including the history, legislation, material, process, production defects and remedies, rework, system compatibility, reliability, and harsh environment performance. This presentation, focusing on the best practices in lead-free manufacturing and the system reliability, also provides the insights in the evolution and development of lead-free electronics.
Who Should Attend
This course provides a working knowledge to all (novice and experienced) who are involved with or interested in Pb-free electronics.
Topics Covered
Solder joint technology – fundamentals, options, pros and cons
PCB surface finishes – fundamentals, options, pros and cons
Component coatings – foundation, options, pros and cons
Manufacturing approaches – materials, processes, impact on reliability
Rework – key parameters
System compatibility – material and process, among materials
Production defects and remedies – unique to lead-free
Testing solder joint reliability – discriminating tests and parameters
Assessing assembly (system) reliability – factors, data vs. conclusion
Reliability in BGA/CSP solder joints, packages and assemblies
Reliability and performance in harsh environment – results, comparison, fundamentals, practices
Ultimate reliability performance – scientific principles, data, rationales
Special topics – role of Bismuth in component coating and solder joint, production cost analysis
Process Control - Monday
T20 Common Failure Modes in Electronic Packages and Assemblies and How to Avoid Them
Andrew Mawer, Freescale Semiconductor
(Instructor
Bio)
Monday, August 18
8:00am – 11:30am
What You Will Learn
This course will cover many of the most common component-level and package to board Pb-free and SnPb-based solder interconnect failure modes experienced by electronic assemblies. These include failures that occur during the assembly process, as well as those that occur with systems in the field or during accelerated testing. The root cause of each failure will be explained and examples of each will be detailed. Examples of the many ways that leaded, leadless and BGA solder joints fail to form properly in reflow or become open or shorted after forming correctly will be covered. Special mention will be made of failure modes that are more prevalent with the transition to Pb-free, such as solder joint fracture from drop or shock, possible increased component or PCB warpage due to higher soldering temperatures, soldering failures related to utilizing mixed Pb-free and SnPb metallurgies, and solderability failures with Pb-free terminations. Failures observed with new package types such as package-on-package (PoP) and fine pitch leadless packages will be covered. Finally, some internal package failure modes such as delamination, various opens that occur within packages, such as the failures of vias and traces in organic substrates will be discussed. The emphasis will be on the prevention of all the failure types discussed, and solutions and strategies to that end will be outlined. Finally, various analytical techniques used to analyze and understand failures in electronic assemblies will be reviewed.
Who Should Attend
This course will benefit anyone involved not only in the design, assembly or troubleshooting of PCB assemblies containing a range of leaded, leadless or BGA packages, but also those within the system reliability or supplier quality functions. Also, people who are responsible for carrying out or interpreting failure analysis would greatly benefit from the material presented. Since Pb-free will be a theme throughout the course, anyone involved with transitioning products or processes to Pb-free will find the course very informative.
Topics Covered
General soldering discussion
BGA solder joint failure modes
Leaded package solder joint failure modes
Leadless package failure modes
Internal component failure modes
Analysis and characterization techniques
Substrates -
Monday
T21 Implementing a Halogen-Free Circuit Board Assembly Process
Tim Jensen and Ron Lasky, Ph.D., PE, Indium Corporation
(Instructor
Bios)
Monday, August 18
8:00am – 11:30am
What You Will Learn
Brought on partly by legislation and partly by environmentalist organizations, the drive to produce halogen-free electronics has grown exponentially over the past two years. The purpose of this half day course is to lay out the drivers behind the halogen-free movement and the actions necessary to successfully assemble a totally halogen-free PCB.
Who Should Attend
SMT managers, process engineers, and quality engineers.
Topics Covered
- Historical perspective on why halogenated materials are used
- Environmental drivers for halogen-free
- Legislative drivers for halogen-free
- Which PCB assembly materials potentially contain halogens
- Methods for identifying halogens in various materials
- Performance and assembly trade-offs with halogen-free materials
- Halogen-free solder pastes
- Overview of paste manufacture
- Halogen-free fluxes
- Assembly process development with halogen-free pastes
- Establishing and implementing a halogen-free plan
THURSDAY,
AUGUST 21
Process Control - Thursday
T22 Design of Experiment Made Easy
Rita Mohanty, Ph.D., Speedline Technologies, Inc.
(Instructor
Bio)
Thursday, August 21
8:00am – 5:00pm
What You Will Learn
Design of Experiment (DOE) is a key statistical tool that helps design and process engineer make breakthrough improvement. Even though the concept of DOE has been in existence since the 1920's, many of us, especially in the electronics industry, are still intimidated by the prospect of using DOE due to a false sense of statistical complexity and high demand on resources. This course is based on the principle of Six Sigma methodology and will focus on using application tools, such as Excel, MiniTab in designing and analyzing the most common and powerful DOE called two-level factorial (full and fractional) design.
Participants will learn all basic concepts behind designing, executing and analyzing DOE through the use of actual electronics assembly case studies and classroom exercise. The classic Catapult exercise will be used to learn and demonstrate "conception to conclusion" of a DOE project.
Who Should Attend
Anyone associated with process and product design/improvement and quality will find this course to be highly practical and user friendly. Process and quality engineers can start applying the knowledge immediately to their everyday jobs and see the results.
Topics Covered
- Philosophy of DOE
- Trial and error, one-factor-at-a-time, full and fractional factorial
- Concept of designed experiment
- Problem identification and factor selection
- Experiment strategies
- Execution of designed experiment
- Design and analyze factorial design
- Full factorial
- Fractional/screening
- Concept of randomization and sampling
- Analysis of DOE
- Main effects
- Interaction
- ANOVA
- Introduction to Excel for DOE and/or Minitab
Business Issues - Thursday
T23 Identifying EMS Market Trends: Learn to Predict the Future and Help Your Company Lead the Pack
Susan Mucha, Powell-Mucha Consulting, Inc. (Instructor
Bio)
Thursday, August 21
8:00am – 11:30am
What You Will Learn
Do you ever wish your company could be offering services just as the market starts to recognize a need for them? The electronics manufacturing services (EMS) industry is still very young, yet demand patterns are established. This course will teach participants ways to identify external factors that may signal market change, and suggest strategies for adapting to changing demand patterns. It will also teach participants to apply common sense and industry knowledge in ways which help their companies lead the pack, instead of struggling to keep up with changing market dynamics.
Who Should Attend
This course is primarily intended for EMS management and personnel involved in their company’s strategic planning activities.
Topics Covered
Typical cycles which repeat in the EMS industry
Key events likely to trigger changes in demand
Useful strategic planning tools
Creating business models which can readily adapt to changing markets
T24 Find It, Book It, Grow It. — Optimizing EMS Account Acquisition
Susan Mucha, Powell-Mucha Consulting, Inc. (Instructor
Bio)
Thursday, August 21
1:30pm – 5:00pm
What You Will Learn
Companies in the EMS industry face a range of challenges in account acquisition. This course looks at ways to optimize the selling process, better enunciate competitive value propositions and grow accounts over time.
Who Should Attend
Corporate, program and sales management, sales personnel, engineers, and operations personnel who are regularly involved in EMS provider account management or support activities.
Topics Covered
Assessing your business model and developing a value proposition suitable for your target markets
Shortening the sales cycle through more effective use of sales and marketing resources
Integrating the program team into the selling process
Developing the most competitive value proposition through better understanding of the selection team
Developing long-term business growth plans
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