A Practical Approach to Test Through Silicon Vias (TSV)Author: Gerard John
Company: Amkor Technology Inc.
Date Published: 10/18/2016 Conference: IWLPC (Wafer-Level Packaging)
Electrical testing of TSVs can only be performed after back grind and etch processes expose the TSVs - a task that is usually performed at the Outsourced Assembly, and Test (OSAT) supplier, see Figure 1. Therefore, when a TSV interposer wafer leaves the foundry, the quality of the TSVs remains unknown until it is processed at the OSAT.
Within a package, the functions of the TSVs can vary widely. Basically, they may be used to carry DC current to power the chip or carry high-speed signals for input /output (I/O) pins or provide low-impedance paths which connect the die to the ground plane. Based on their functions, specific tests need to be performed to verify TSV functionality. Furthermore, TSVs need to undergo characterization tests such as stress and electro-migration to quantify their long-term reliability.
This paper analyzes the different kinds of tests that should be performed on TSVs during the design, qualification and production phases. It provides a case study to an interposer vendor qualification and analyzes the data collected in the process through various laboratory experiments. Additionally, it also discusses the practical challenges faced while testing TSVs on thinned wafers, including the limitations of equipment and probe card capability.
Through Silicon Via, TSV, Test, OSAT, TSV Redundancy
Cost to download:Members: Free! (Log on to receive the member rate)
Not a member yet? Join SMTA today!
Notice: Sharing of articles is prohibited. Downloaded papers must only be stored on a local hard drive and not in a shared repository either internal or external.