Keynotes



Nanotechnology in Electronics Packaging, Interconnect, and Assembly: Hype or Reality?

Charles E. Bauer, Ph.D, TechLead Corporation

Wednesday, June 7, 2017 | 1:00pm-2:00pm

Charles E. Bauer, Ph.D, TechLead Corporation

While often exaggerated and over-promised, nanotechnology now provides vital performance enhancements to electronic systems after over a decade of R&D. Advanced solders and adhesives pioneered nanotech adoption by electronics manufacturers by minimizing technical risk and masking their nanotechnology nature via drop-in alternatives. Hype gives way to breakthrough as new nanotech solutions address multiple aspects of packaging, interconnect, and assembly. Leading nanotech contributions today include surface finishes for stencils and tin whisker mitigation, adhesives, die attach and solder replacements, via structures, additive circuit formation and 3D printing, novel conductors and dielectrics, and passive components.

The authors examine a broad range of exciting evolutionary as well as revolutionary nano-based technologies for electronics manufacturing, identifying key technical challenges and fascinating practical applications characterizing the potential routes to commercialization.

As with most technical developments, evolutionary nano-enabled solutions find quicker adoption thanks to existing standards and infrastructure, but revolutionary nano-alternatives entice early adopters with their potential, albeit at substantial risk, to displace incumbent technologies or even more excitingly to create entirely new markets. Presentations of practical and cost effective applications demonstrate that nanotechnology today indeed represents reality instead of hype.

About the Presenter

Charles E. Bauer, Ph.D. serves as Senior Managing Director of TechLead Corporation, a technology management company specializing in the electronics packaging, interconnection and assembly industry, as well as Director of the University of Portland’s Global Executive Leadership MBA program. Dr. Bauer focuses in the areas of strategic technology planning, market analysis and business development, particularly in the international arena.

With more than 40 years’ experience spanning the range from printed circuit board and hybrid fabrication through complex IC metallization, multilayer packaging, multichip modules, system in package, 3D packaging and flat panel display packaging and assembly as well as nano-technology applications in electronics manufacturing, his publications exceed 250 papers, articles and columns. Combined with applications experience in implantable, surgical and diagnostic medical devices Dr. Bauer represents a balance between technology and practical implementation for real world products. He also lectures throughout the world on technology, business and market topics as well as serving on several corporate boards and international corporate, government and educational institution advisory councils.

A Senior Member of IEEE, he remains active in the SMTA, JIEP, ASM and IMAPS Europe as well. Dr. Bauer served on the Boards of both the SMTA and IMAPS and as President of IMAPS in 2001-2002. Awards received include Tektronix Technical Innovation Award, Fellow of IMAPS, the International Leadership Award from the SMTA, Jesuit High School Hall of Fame, University of Portland Significant 75 Alumni and SMTA 25th Anniversary Luminary as founder of the Pan Pacific Microelectronics Symposium.




The Importance of Design to Improve Manufacturing Process Yield and Reliability

Jasbir Bath, Koki Solder

Thursday, June 8, 2017 | 11:00am-12:00pm

In electronics manufacturing there is a need to improve manufacturing yield and reliability with the variety of components being assembled. The importance of board pad design and stencil aperture design can be overlooked with the rush to assemble product in a timely manner with the range of products being assembled which can then lead to increased manufacturing issues and more rework. The presentation will discuss how optimizing board pad design and stencil design can help improve yields with chip components, BGA/CSP components, BTC/MLF/QFN/ LGA components and lead-frame components and lead to improved reliability with a discussion of issues caused if non-optimized designs are used. Other factors to consider in design include selection of soldering materials, board and component surface finishes with a review of their influence on yield and reliability.






Cancellation Policy: Registration fees will be refunded (less a $75 processing fee) if written notice is postmarked two weeks prior to the event date. Cancellations received within two weeks prior to event date will not be refunded to cover costs incurred.