Counterfeit Electronic Parts and
Electronic Supply Chain Symposium East

Technical Symposium and Expo: June 25-26, 2013
Workshops: June 27, 2013
Marriott Inn & Conference Center
University of Maryland
 
Organized by SMTA and CALCE
The Conference
   Tech Sessions
   Workshops
   Tech Committee

Accommodations


Media Sponsor:
Circuits Assembly

PCD&F


Endorsed by:
SAE International

SiliconExpert Technologies


Workshops

Thursday, June 27

Listed below are half-day and full-day workshops led by industry professionals with extensive experience in their respective subject areas. Workshop instructors deliver focused, in-depth presentations on topics of timely importance, based on their research and industry experience.

Please note: courses will be located in Glen L. Martin Hall on the University of Maryland Campus.

  • WS1 - (Full Day) Counterfeit Part Avoidance and Detection
  • WS2 - (Half Day) Electrical Testing for Counterfeit Detection
  • WS3 - (Half Day) Suspect Counterfeit Materials, Electronic Components & ESD Shipping Packaging Issues in the Global Supply Chain

    WS1

    Counterfeit Part Avoidance and Detection

    8:30am – 5:00pm
    Diganta Das and Bhanu Sood, CALCE

    Overview:
    Counterfeit electronics components continue to make news. In recent years, the prevalence of these fake parts has only increased, with reports of parts discovered in military systems, medical devices and process control equipment. The elements of the methods that broadly define the methods of protecting your organization include:

  • Supply chain management (proper procurement policies)
  • Assessment of parts, manufacturers, and distributors
  • Life cycle management including obsolescence
  • Supply chain level authentication
  • Counterfeit risk detection (through inspection/testing/characterization)
  • Traceability verification using tools such as serialization codes, tags/taggants
  • Law enforcement and government policies

    The first half of this course will take the attendees through the steps of assessment of parts, manufacturers, and distributors; the various tagging and serializing techniques that are proposed and in use, the impacts of the government and law enforcement policies in the counterfeit part avoidance process. The attendees will learn how to prepare a counterfeit part policy for their organization.

    This increased risk has not only focused the spotlight on counterfeit component detection methods, but the ability of these techniques to uncover suspect parts that are produced using sophisticated counterfeit creation techniques. Second half of this workshop will be on parts inspection and materials characterization begins with a primer on the diverse counterfeit part creation techniques, including the recently discovered "media-blasting" method. It then discusses the effectiveness of various non-destructive techniques and destructive processing steps for inspecting suspect counterfeit components. This part emphasizes on the materials characterization tools and techniques that are increasingly being deployed by numerous for positive identification of suspect parts. Techniques such as Fourier transform infrared spectroscopy (FTIR), thermo-mechanical analysis and x-ray fluorescence spectroscopy (XRF) have recently found new applications for counterfeit part detection in addition to more traditional laboratory analytical uses.

    Who Should Attend:
    Engineers and managers tasked with developing counterfeit prevention policies for a company will find this course valuable. This course prepares them to not only create a policy for the company but also allows them to assess if the policies of their supply chain partners are strong and can contribute to the problems of counterfeit parts. The quality managers and test engineers tasked with detection of counterfeit parts will learn about in depth techniques that go far beyond the visual inspection methods and prepare the company in detecting well-made counterfeit parts. Workshop attendees will also learn how to effectively engage testing laboratories in a cost effective manner to determine risk of counterfeit components.

    About the Instructors:
    Diganta Das (Ph.D., Mechanical Engineering, University of Maryland, College Park, B.Tech, Manufacturing Science and Engineering, Indian Institute of Technology) is a member of the research staff at the Center for Advanced Life Cycle Engineering. His expertise is in reliability, environmental and operational ratings of electronic parts, uprating, electronic part reprocessing, counterfeit electronics, technology trends in the electronic parts and parts selection and management methodologies. He performs benchmarking processes and organizations of electronics companies for parts selection and management and reliability practices. Dr. Das has published more than 50 articles on these subjects, and presented his research at international conferences and workshops. He had been the technical editor for two IEEE standards and is vice chairman of IEEE Reliability Society Standard Board coordinating two additional standards. He is an editorial board member for the journal Microelectronics Reliability and Circuit World. He is a Six Sigma Black Belt and a member of IEEE and IMAPS.

    Bhanu Sood is the Director of the Test Services and Failure Analysis Laboratory at CALCE. Bhanu's research areas at CALCE include development of analysis methodologies for component- and PCBA-level failures, materials characterization techniques for counterfeit parts identification, and investigating failure mechanisms in printed circuit boards. Prior to joining CALCE, Bhanu worked at the Naval Research Laboratory in the areas of embedded electronics, embedded batteries, and laser-assisted micro-fabrication techniques. Bhanu holds a US Patent for a laser-based technique for the transfer and embedding of electronic components and devices.





    W2

    Electrical Testing for Counterfeit Detection

    Sultan Ali Lilani, Integra Technologies LLC
    8:30am – 12:00pm

    Overview:
    The extent of electrical testing that is required to authenticate the product being tested must take into taking into consideration the application and the risks associated with the application. The total risk of the project is based on product risk, component risk, and supplier risk. The subsequent electrical test needed to mitigate such risk determines the extent of electrical testing that needs to be performed. It is imperative that we understand the risk level and what we are trying to accomplish when a test plan is set-up to define the extent of electrical testing. Although full datasheet electrical testing is most desirable for any counterfeit mitigation testing; however such full electrical testing per the datasheet can be cost prohibitive and in some cases may not be possible given the time constraints of when the product is needed to be used in the actual application.

    "What level of electrical testing is enough or not enough" can best be determined by a test plan that that is optimal in terms of making sure there are good test coverage as well as time constraints that the industry faces. The test plan should show:

  • Why the test plan is important to determine the extent of the testing that should be performed
  • How cost can be contained if a proper test plan is developed
  • Why if a proper test plan is not developed, the authentication testing has the potential of causing latent damage to the product
  • How can "false testing" be avoided. We have found that an understanding of, or lack of understanding, of the application and requirements could lead to extensive testing and still not authenticate the product
  • "Undetected" prevalent practice of over binned market
  • How "speed binning" helps the recognition of counterfeit product
  • What are the optimal test methodologies, considering cost, time and available information
  • Usages of electrical test tools, including curve tracer, ATE and bench testing to gain the optimum result given the risk and what one is trying to accomplish

    Who Should Attend:
    This training session is designed for electronics distribution personnel involved with establishing and maintaining a Fraudulent/Counterfeit Electronic Parts Avoidance Program in conformance with the requirements of AS6081 or other customer requirements that require electrical testing as part of the test plan. Additionally, OEM, contract manufacturer, government agency, and other key industry personnel that want to know and understand how electrical testing is performed or why is it required as part of the counterfeit mitigation plan will benefit from the information presented in this course.

    About the Instructor:
    Sultan Ali Lilani is Manager of Technical Business Development at Integra Technologies. Prior to joining Integra Technologies, Sultan held a similar position at Hi-Reliability Microelectronics, a Division of Silicon Turnkey Solutions. Previous to Hi-Rel Microelectronics, Sultan was Director of Quality and Reliability at NEC Electronics for 18 years and also served as Director of Product and Test at Akros Silicon, an energy management IC start-up. Sultan has in-depth knowledge of Reliability Engineering, Program Management, Testing and Qualification for Aerospace, Defense and Industrial applications for semiconductor products including Digital, Analog, Mixed Signal, ASICs, Microprocessors, Memory, Custom Semiconductors, Discretes, Linears and Passives.





    WS3

    Suspect Counterfeit Materials, Electronic Components & ESD Shipping Packaging Issues in the Global Supply Chain

    Bob Vermillion, RMV Technology Group, LLC
    1:30pm-5:00pm

    Overview:
    Suspect Counterfeiting extends beyond Fasteners, Slings and ESD Sensitive Devices. The visual inspection process does not go far enough. The days of purchasing USA products from your local distributor or manufacturer can be unknowingly circumvented by its procurement or engineering outsourcing from the Pacific Rim.

    Aerospace sectors have seen launch delays and issues in space due to non-compliant materials. A semiconductor vendor’s technical data sheet can prove meaningless unless subjected to in-house or 3rd party validation. To compound the matter, a pacemaker circuit card today is more likely to be a Class 0 device with a sensitivity level of less than 50 volts within an ESD controlled environment. In 1971, the Intel 4004 was equal to about 2300 transistors. Modern day densification has led to a 2 billion transistor equivalency with the Intel® Itanium® processors (Code Name: Tukwila) in 2010.

    Are you or your supply chain properly handling Class 0 ESD sensitive devices with validated packaging during the parts inspection process? Moreover, is your 3rd party validation process inspecting incoming devices by taking ESD precautions in the handling of electrostatic discharge sensitive devices? Do you know that Dip Tubes, Tape & Reel and JEDEC trays are being “knocked off” or are being suspect counterfeited? Learn How Suspect Counterfeiters downgrade packaging and utilized improper box maker certificates. What manufacturing advancements can stop the suspect counterfeiter in their tracks?

    Today, more advanced packaging engineering principles are utilized to insure that products are protected, branded and properly labeled or RFID tagged so that non-conforming and suspect counterfeit products can be more easily traced, identified, inspected and mitigated. Therefore, original products designed with engineered packaging are more difficult to duplicate, substitute or counterfeit.

    If one does not test, then one does not have much of a program. See real case examples. If the global supply chain does not think that Suspect Counterfeit packaging material has infiltrated the supply chain, then think again.

    Who Should Attend:

  • Engineers & Technicians
  • Quality Assurance
  • Procurement
  • Supply Chain
  • US Citizens Only
  • Professionals who buy raw materials, packaging, parts components from systems integrators, manufacturers, distributors and brokers

    About the Instructor:
    Bob Vermillion has developed advanced ESD materials with issuance of a U.S. Patent; one of Bob's ESD developments was NASA Mars Mission approved. Bob has extensive expertise in the evaluation of spacecraft composites and Triboelectrification materials mitigation for a Lunar or Mars Surface. Moreover, Bob has developed an advanced and repeatable test method for mapping materials for Tribocharge Generation at low RH.

    Bob is a Professional Development Certification Lecturer for UCB-Space Science Labs, San Jose State University, California State Polytechnic University, Loyola-Marymount University, Clemson and Oxford University. Bob conducts ESD Seminars for aerospace/defense, space technology, medical, telecom, electronics, disk media, semiconductor and automotive industries. Engagements also include ESDiscovery 2000-2003 in the USA, Malaysia, the Philippines and Singapore.

    Bob Vermillion is an iNARTE Certified ESD & Product Safety Engineer, Active Member of the SAE G19 and G21 Committees and Vice-Chair of the ANSI ESD Aerospace WIP 20.21 Working Group. RMV Technology Group, LLC is a Member of the American Council of Independent Labs (ACIL) & Union Internationale des Laboratories Independants (UILI), certified by ESD Journal as an Approved Laboratory, member of ESDA, IEEE, IoPP and ASTM. An active member of the ESDA Standards Committee, Bob sits on the Corporate Advisory Board of the California Disabled Veterans Business Alliance. RMV Technology Group, LLC is a SDVOSB/8(a) and SDB Firm, State of California certified Small Business and DVBE #0024505 and a federally Certified Veteran Enterprise by the Veterans Administration, Washington, D.C. RMV is a certified member of Northern California Supplier Minority Development Council (NCSMDC). RMV is a member of GIDEP.










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